JPS5496726A - Driving circuit of motor - Google Patents

Driving circuit of motor

Info

Publication number
JPS5496726A
JPS5496726A JP282078A JP282078A JPS5496726A JP S5496726 A JPS5496726 A JP S5496726A JP 282078 A JP282078 A JP 282078A JP 282078 A JP282078 A JP 282078A JP S5496726 A JPS5496726 A JP S5496726A
Authority
JP
Japan
Prior art keywords
transistor
current
high level
gate pulse
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP282078A
Other languages
Japanese (ja)
Inventor
Masahiro Yoshimi
Shigeo Kurachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP282078A priority Critical patent/JPS5496726A/en
Publication of JPS5496726A publication Critical patent/JPS5496726A/en
Pending legal-status Critical Current

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  • Motor And Converter Starters (AREA)

Abstract

PURPOSE: To prevent the generating of spiky current, by limiting the dimension of current flowing through a transistor only for a period necessary for the change- over when turning the transistor ON-OFF.
CONSTITUTION: When this circuit is arranged by NAND circuits ND1, ND2 and ϕ signals are changed over to a low level from a high level or inversely changed over, the output of each NAND circuit is on a high level during the applying period of the gate pulse and transistors Q2, Q3 are also under OFF conditions by applying gate pulse signals on low levels with wider width than the widest width by the dispersion of the charge storage time ta of each transistor to the input sides of the one sides of each NAND circuit. Thus, the generation of spiky current can be prevented.
COPYRIGHT: (C)1979,JPO&Japio
JP282078A 1978-01-17 1978-01-17 Driving circuit of motor Pending JPS5496726A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP282078A JPS5496726A (en) 1978-01-17 1978-01-17 Driving circuit of motor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP282078A JPS5496726A (en) 1978-01-17 1978-01-17 Driving circuit of motor

Publications (1)

Publication Number Publication Date
JPS5496726A true JPS5496726A (en) 1979-07-31

Family

ID=11540040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP282078A Pending JPS5496726A (en) 1978-01-17 1978-01-17 Driving circuit of motor

Country Status (1)

Country Link
JP (1) JPS5496726A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61195793U (en) * 1985-05-27 1986-12-06

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61195793U (en) * 1985-05-27 1986-12-06

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