JPS5482216A - Coding and decoding system - Google Patents

Coding and decoding system

Info

Publication number
JPS5482216A
JPS5482216A JP14973677A JP14973677A JPS5482216A JP S5482216 A JPS5482216 A JP S5482216A JP 14973677 A JP14973677 A JP 14973677A JP 14973677 A JP14973677 A JP 14973677A JP S5482216 A JPS5482216 A JP S5482216A
Authority
JP
Japan
Prior art keywords
bit
groups
coding
bit groups
complexing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14973677A
Other languages
Japanese (ja)
Inventor
Akira Kakehi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14973677A priority Critical patent/JPS5482216A/en
Publication of JPS5482216A publication Critical patent/JPS5482216A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce the complexing of the apparatus for the purpose of code conversion by coding binary digital data with specific coding logics and decoding these with specific decoding logics.
CONSTITUTION: Binary digital original data strings are segmented at each 2 bits and four kinds of strings of 2 bit groups and 4 kinds of 4 bit position codes are corresponded 1 to 1. The 2 bit groups formed thereby are converted to position codes according to the correspondence relations. For two or more consecutive codes out of these position code groups, the foremost ones are converted to 0, 1, 0, 0 and the subsequent ones to 1, 0, 0, 0. Next, the data strings having been coded are segmented at each 4 bits and if the 4-bit group is 0, 0, 0, 0 preceding to the 4-bit group whose leading bit is 1, it is regarded as 0, 0, 0, 1 and if other than this, it is regarded 0, 0, 0, 0, thus the 4-bit groups are decoded to the corresponding 2-bit groups. Thereby, complexing of the apparatus for code conversion may be reduced.
COPYRIGHT: (C)1979,JPO&Japio
JP14973677A 1977-12-13 1977-12-13 Coding and decoding system Pending JPS5482216A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14973677A JPS5482216A (en) 1977-12-13 1977-12-13 Coding and decoding system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14973677A JPS5482216A (en) 1977-12-13 1977-12-13 Coding and decoding system

Publications (1)

Publication Number Publication Date
JPS5482216A true JPS5482216A (en) 1979-06-30

Family

ID=15481677

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14973677A Pending JPS5482216A (en) 1977-12-13 1977-12-13 Coding and decoding system

Country Status (1)

Country Link
JP (1) JPS5482216A (en)

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