JPS5481051A - Digital circuit - Google Patents
Digital circuitInfo
- Publication number
- JPS5481051A JPS5481051A JP14948777A JP14948777A JPS5481051A JP S5481051 A JPS5481051 A JP S5481051A JP 14948777 A JP14948777 A JP 14948777A JP 14948777 A JP14948777 A JP 14948777A JP S5481051 A JPS5481051 A JP S5481051A
- Authority
- JP
- Japan
- Prior art keywords
- supplies
- signal
- divider circuits
- normal
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE: To secure normal operation over all devices with normal clock signal supplies even if many supplies get out of order and only one supply operates normally, by providing a plural number of clock signal supplies.
CONSTITUTION: Oscillation frequencies (f1) and (f1') of independent oscillation circuits 1 and 1' are applied to divider circuits 2 and 2' at an adequate stage, whose outputs are inputted to flip-flop 5 via OR gate 4. Output Q of flip-flop 5 is supplied as clock CL for the reference signal of a device and also resets divider circuits 2 and 2'. Further, the output of the entire stage of divider circuits 2 and 2' is connected to the input of AND gate 6. In this constitution, only the signal of the highest frequency is selected from a plural number of signals and outputted and even if one of supplies gets wrong and stops, a signal from normal one is outputted, thereby protecting devices from a fault.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14948777A JPS5481051A (en) | 1977-12-12 | 1977-12-12 | Digital circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14948777A JPS5481051A (en) | 1977-12-12 | 1977-12-12 | Digital circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5481051A true JPS5481051A (en) | 1979-06-28 |
Family
ID=15476218
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14948777A Pending JPS5481051A (en) | 1977-12-12 | 1977-12-12 | Digital circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5481051A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002341960A (en) * | 2001-05-10 | 2002-11-29 | Ge Medical Systems Global Technology Co Llc | Method and circuit for selecting and outputting clock signal |
-
1977
- 1977-12-12 JP JP14948777A patent/JPS5481051A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002341960A (en) * | 2001-05-10 | 2002-11-29 | Ge Medical Systems Global Technology Co Llc | Method and circuit for selecting and outputting clock signal |
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