JPS5473566A - Ic chip support and method of fabricating same - Google Patents

Ic chip support and method of fabricating same

Info

Publication number
JPS5473566A
JPS5473566A JP12368478A JP12368478A JPS5473566A JP S5473566 A JPS5473566 A JP S5473566A JP 12368478 A JP12368478 A JP 12368478A JP 12368478 A JP12368478 A JP 12368478A JP S5473566 A JPS5473566 A JP S5473566A
Authority
JP
Japan
Prior art keywords
chip support
fabricating same
fabricating
same
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12368478A
Other languages
English (en)
Other versions
JPS5843909B2 (ja
Inventor
Hanmaa Robaato
Esu Seichiyaa Kenesu
Sanpoguna Mikaeru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5473566A publication Critical patent/JPS5473566A/ja
Publication of JPS5843909B2 publication Critical patent/JPS5843909B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4885—Wire-like parts or pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP53123684A 1977-11-18 1978-10-09 Ｉｃチツプ支持体及びその製造方法 Expired JPS5843909B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US85277977A 1977-11-18 1977-11-18

Publications (2)

Publication Number Publication Date
JPS5473566A true JPS5473566A (en) 1979-06-12
JPS5843909B2 JPS5843909B2 (ja) 1983-09-29

Family

ID=25314194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53123684A Expired JPS5843909B2 (ja) 1977-11-18 1978-10-09 Ｉｃチツプ支持体及びその製造方法

Country Status (3)

Country Link
EP (1) EP0002166A3 (ja)
JP (1) JPS5843909B2 (ja)
IT (1) IT1160061B (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4551192A (en) * 1983-06-30 1985-11-05 International Business Machines Corporation Electrostatic or vacuum pinchuck formed with microcircuit lithography
US5917707A (en) * 1993-11-16 1999-06-29 Formfactor, Inc. Flexible contact structure with an electrically conductive shell
US5476211A (en) 1993-11-16 1995-12-19 Form Factor, Inc. Method of manufacturing electrical contacts, using a sacrificial member
US4896464A (en) * 1988-06-15 1990-01-30 International Business Machines Corporation Formation of metallic interconnects by grit blasting
US5170245A (en) * 1988-06-15 1992-12-08 International Business Machines Corp. Semiconductor device having metallic interconnects formed by grit blasting
US5243133A (en) * 1992-02-18 1993-09-07 International Business Machines, Inc. Ceramic chip carrier with lead frame or edge clip
US6835898B2 (en) 1993-11-16 2004-12-28 Formfactor, Inc. Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures
US6336269B1 (en) 1993-11-16 2002-01-08 Benjamin N. Eldridge Method of fabricating an interconnection element
EP0792517B1 (en) * 1994-11-15 2003-10-22 Formfactor, Inc. Electrical contact structures from flexible wire
EP0792519B1 (en) * 1994-11-15 2003-03-26 Formfactor, Inc. Interconnection elements for microelectronic components
KR100335166B1 (ko) * 1994-11-15 2002-05-04 이고르 와이. 칸드로스 반도체 장치를 실행시키는 방법
US6727579B1 (en) 1994-11-16 2004-04-27 Formfactor, Inc. Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures
AU6377796A (en) * 1995-05-26 1996-12-11 Formfactor, Inc. Fabricating interconnects and tips using sacrificial substra tes
US20100065963A1 (en) 1995-05-26 2010-03-18 Formfactor, Inc. Method of wirebonding that utilizes a gas flow within a capillary from which a wire is played out
US8033838B2 (en) 1996-02-21 2011-10-11 Formfactor, Inc. Microelectronic contact structure

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3757271A (en) * 1971-10-04 1973-09-04 Ibm Integrated circuit package
US3959874A (en) * 1974-12-20 1976-06-01 Western Electric Company, Inc. Method of forming an integrated circuit assembly

Also Published As

Publication number Publication date
EP0002166A2 (fr) 1979-05-30
JPS5843909B2 (ja) 1983-09-29
IT7829674A0 (it) 1978-11-10
IT1160061B (it) 1987-03-04
EP0002166A3 (fr) 1979-08-08

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