JPS5469935A - Level converter circuit - Google Patents

Level converter circuit

Info

Publication number
JPS5469935A
JPS5469935A JP13665077A JP13665077A JPS5469935A JP S5469935 A JPS5469935 A JP S5469935A JP 13665077 A JP13665077 A JP 13665077A JP 13665077 A JP13665077 A JP 13665077A JP S5469935 A JPS5469935 A JP S5469935A
Authority
JP
Japan
Prior art keywords
circuit
level converter
converter circuit
transistor
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13665077A
Other languages
Japanese (ja)
Inventor
Teruo Isobe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13665077A priority Critical patent/JPS5469935A/en
Publication of JPS5469935A publication Critical patent/JPS5469935A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01812—Interface arrangements with at least one differential stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To reduce the number of costituting elements and power consumption by composing a level converter circuit of a differential circuit, inverter circuit and output transistor. CONSTITUTION:Level converter circuit 2 for driving TTL circuit 3 by being supplied with the output signal of ECL circuit 1 consists of the differential circuit of transistors Q1 and Q2, inverter circuit Q3 and output transistor Q4, and since the collector potential of Q2 is high in level with Q1 ON and low with Q2 ON, adequately selecting constant-current circuit I01 and resistances R1 and R2 makes it possible to turn ON-OFF Q3, so that transistor Q4 driving the TTL circuit can be turned ON-OFF by its collector side output.
JP13665077A 1977-11-16 1977-11-16 Level converter circuit Pending JPS5469935A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13665077A JPS5469935A (en) 1977-11-16 1977-11-16 Level converter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13665077A JPS5469935A (en) 1977-11-16 1977-11-16 Level converter circuit

Publications (1)

Publication Number Publication Date
JPS5469935A true JPS5469935A (en) 1979-06-05

Family

ID=15180278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13665077A Pending JPS5469935A (en) 1977-11-16 1977-11-16 Level converter circuit

Country Status (1)

Country Link
JP (1) JPS5469935A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60118A (en) * 1983-03-16 1985-01-05 フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン Ttl output stage
JPS60136417A (en) * 1983-12-26 1985-07-19 Hitachi Ltd Buffer circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60118A (en) * 1983-03-16 1985-01-05 フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン Ttl output stage
JPS60136417A (en) * 1983-12-26 1985-07-19 Hitachi Ltd Buffer circuit

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