JPS5460826A - Definition improving circuit - Google Patents

Definition improving circuit

Info

Publication number
JPS5460826A
JPS5460826A JP12777577A JP12777577A JPS5460826A JP S5460826 A JPS5460826 A JP S5460826A JP 12777577 A JP12777577 A JP 12777577A JP 12777577 A JP12777577 A JP 12777577A JP S5460826 A JPS5460826 A JP S5460826A
Authority
JP
Japan
Prior art keywords
circuit
supplied
output
video signal
luminance level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12777577A
Other languages
Japanese (ja)
Inventor
Susumu Yoshida
Yoshio Ishigaki
Kinya Magai
Takahisa Tsuchiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP12777577A priority Critical patent/JPS5460826A/en
Publication of JPS5460826A publication Critical patent/JPS5460826A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To secure the assured improvement of the definition for the TV picture regardless of the luminance level and the scale of the variation of the luminance level, by controlling the preshoot and the overshoot in accordance with the scale of the luminance level and its variation of the video signal.
CONSTITUTION: The video signal supplied through input terminal 1 is supplied to secondary differentiating circuit 3, and the output of circuit 3 is supplied to variable gain inverse amplifier circuit 4. Then the output of circuit 4 is supplied to rectifier circuit 6, and the negative part of the output is drawn out to be supplied to compounder 7. At the same time, the video signal from terminal 1 is applied to compounder 7 via non-inverse amplifier circuit 10 and the series circuit of phase shift circuit 11 for phase compensation, and the output of 7 is applied to primary differential waveform converter circuit 14 to control electron beam scanning velocity modulation means G4 provided to CRT. In this constitution, the higher the luminance level of the video signal, the higher the absolute value level of the preshoot and the overshoot is supplied to waveform converter circuit 2. Thus, modulation means G4 is controlled via circuit 14 and according to the output of compounder 7
COPYRIGHT: (C)1979,JPO&Japio
JP12777577A 1977-10-25 1977-10-25 Definition improving circuit Pending JPS5460826A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12777577A JPS5460826A (en) 1977-10-25 1977-10-25 Definition improving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12777577A JPS5460826A (en) 1977-10-25 1977-10-25 Definition improving circuit

Publications (1)

Publication Number Publication Date
JPS5460826A true JPS5460826A (en) 1979-05-16

Family

ID=14968375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12777577A Pending JPS5460826A (en) 1977-10-25 1977-10-25 Definition improving circuit

Country Status (1)

Country Link
JP (1) JPS5460826A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61154070U (en) * 1985-03-14 1986-09-24

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61154070U (en) * 1985-03-14 1986-09-24

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