JPS5460548A - Measurement device for modulation degree - Google Patents

Measurement device for modulation degree

Info

Publication number
JPS5460548A
JPS5460548A JP12711177A JP12711177A JPS5460548A JP S5460548 A JPS5460548 A JP S5460548A JP 12711177 A JP12711177 A JP 12711177A JP 12711177 A JP12711177 A JP 12711177A JP S5460548 A JPS5460548 A JP S5460548A
Authority
JP
Japan
Prior art keywords
value
signal
modulation
circuit
modulation degree
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12711177A
Other languages
Japanese (ja)
Inventor
Mitsue Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP12711177A priority Critical patent/JPS5460548A/en
Publication of JPS5460548A publication Critical patent/JPS5460548A/en
Pending legal-status Critical Current

Links

Landscapes

  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE: To secure the quick and accurate measurement of the modulation degree through the arithmetic process and by holding the peak value, non-modulation level value and down-value from the modulation waveform.
CONSTITUTION: The RF signal is supplied to terminal 1, and the AF signal is drawn out through amplifier 2 and detection circuit 3. Switching circuit 5 functions to draw out components AWC of the RF signal and holds peak value A, non-modulation level C and down-value B respectively at holding circuits 6W8. Voltage A-C and C-B are generated through subtraction circuit 9 and 10, and are the calculated through division circuit 11 and 11' as shown in the diagram to be sent to indicator 13 as well as to be drawn out to output terminal 14 and 15
COPYRIGHT: (C)1979,JPO&Japio
JP12711177A 1977-10-21 1977-10-21 Measurement device for modulation degree Pending JPS5460548A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12711177A JPS5460548A (en) 1977-10-21 1977-10-21 Measurement device for modulation degree

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12711177A JPS5460548A (en) 1977-10-21 1977-10-21 Measurement device for modulation degree

Publications (1)

Publication Number Publication Date
JPS5460548A true JPS5460548A (en) 1979-05-16

Family

ID=14951870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12711177A Pending JPS5460548A (en) 1977-10-21 1977-10-21 Measurement device for modulation degree

Country Status (1)

Country Link
JP (1) JPS5460548A (en)

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