JPS5459585A - Control delay detecting circuit - Google Patents

Control delay detecting circuit

Info

Publication number
JPS5459585A
JPS5459585A JP12568577A JP12568577A JPS5459585A JP S5459585 A JPS5459585 A JP S5459585A JP 12568577 A JP12568577 A JP 12568577A JP 12568577 A JP12568577 A JP 12568577A JP S5459585 A JPS5459585 A JP S5459585A
Authority
JP
Japan
Prior art keywords
signals
memory
control delay
delay
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12568577A
Other languages
Japanese (ja)
Inventor
Yoshiaki Takahashi
Yasushi Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12568577A priority Critical patent/JPS5459585A/en
Publication of JPS5459585A publication Critical patent/JPS5459585A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q9/00—Arrangements in telecontrol or telemetry systems for selectively calling a substation from a main station, in which substation desired apparatus is selected for applying a control signal thereto or for obtaining measured values therefrom

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Selective Calling Equipment (AREA)

Abstract

PURPOSE:To prevent unnecessary warning signals and display from being generated during the circuit changing operation by considering that the circuit change never fails to be accomplished upon reception of idle signals from a station to be controlled so that no control delay signal may be generated during reception of the idle signals. CONSTITUTION:A control delay detecting circuit is composed of a character error memory 12, a control signal detecting memory 13, an AND gate 14 and a control delay memory 15. The fact that both the memories 12 and 13 are set is judged by means of the AND gate 14 so that the delay memory 15 is set, when next synchronous signals are detected, i.e., in response to synchronous signal detecting signals C. The resultant output is used in place of the character error signals to generate control delay signals h. The errors upon asynchronism due to the circuit change do not lead to causes for erroneously generating the delay signals h because the memory 13 is not set.
JP12568577A 1977-10-21 1977-10-21 Control delay detecting circuit Pending JPS5459585A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12568577A JPS5459585A (en) 1977-10-21 1977-10-21 Control delay detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12568577A JPS5459585A (en) 1977-10-21 1977-10-21 Control delay detecting circuit

Publications (1)

Publication Number Publication Date
JPS5459585A true JPS5459585A (en) 1979-05-14

Family

ID=14916137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12568577A Pending JPS5459585A (en) 1977-10-21 1977-10-21 Control delay detecting circuit

Country Status (1)

Country Link
JP (1) JPS5459585A (en)

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