JPS51116629A - Memory system - Google Patents
Memory systemInfo
- Publication number
- JPS51116629A JPS51116629A JP50041281A JP4128175A JPS51116629A JP S51116629 A JPS51116629 A JP S51116629A JP 50041281 A JP50041281 A JP 50041281A JP 4128175 A JP4128175 A JP 4128175A JP S51116629 A JPS51116629 A JP S51116629A
- Authority
- JP
- Japan
- Prior art keywords
- memory system
- memory plane
- providing
- bias signal
- correcting circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Memory System (AREA)
Abstract
PURPOSE: To set up the address zone of each memory plane automatically by providing the memory plane with a bias signal correcting circuit.
COPYRIGHT: (C)1976,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50041281A JPS51116629A (en) | 1975-04-07 | 1975-04-07 | Memory system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50041281A JPS51116629A (en) | 1975-04-07 | 1975-04-07 | Memory system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS51116629A true JPS51116629A (en) | 1976-10-14 |
JPS5516335B2 JPS5516335B2 (en) | 1980-05-01 |
Family
ID=12604052
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50041281A Granted JPS51116629A (en) | 1975-04-07 | 1975-04-07 | Memory system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS51116629A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54107636A (en) * | 1978-02-10 | 1979-08-23 | Fujitsu Ltd | Address selection method for memory unit |
JPS5969825A (en) * | 1982-10-15 | 1984-04-20 | Matsushita Electric Works Ltd | Method for setting address of input and output device |
JPS62149093A (en) * | 1985-12-19 | 1987-07-03 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Memory system for providing continuous address space |
JPS62151961A (en) * | 1985-12-25 | 1987-07-06 | Fuji Electric Co Ltd | Programmable controller system |
JPS63282863A (en) * | 1987-05-15 | 1988-11-18 | Fujitsu Ltd | Memory access control system |
JPH01298452A (en) * | 1988-05-27 | 1989-12-01 | Toshiba Corp | Memory device |
-
1975
- 1975-04-07 JP JP50041281A patent/JPS51116629A/en active Granted
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54107636A (en) * | 1978-02-10 | 1979-08-23 | Fujitsu Ltd | Address selection method for memory unit |
JPS579154B2 (en) * | 1978-02-10 | 1982-02-19 | ||
JPS5969825A (en) * | 1982-10-15 | 1984-04-20 | Matsushita Electric Works Ltd | Method for setting address of input and output device |
JPS62149093A (en) * | 1985-12-19 | 1987-07-03 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Memory system for providing continuous address space |
JPS62151961A (en) * | 1985-12-25 | 1987-07-06 | Fuji Electric Co Ltd | Programmable controller system |
JPH0582616B2 (en) * | 1985-12-25 | 1993-11-19 | Fuji Electric Co Ltd | |
JPS63282863A (en) * | 1987-05-15 | 1988-11-18 | Fujitsu Ltd | Memory access control system |
JPH01298452A (en) * | 1988-05-27 | 1989-12-01 | Toshiba Corp | Memory device |
Also Published As
Publication number | Publication date |
---|---|
JPS5516335B2 (en) | 1980-05-01 |
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