JPS5452406A - Receiver circuit for transmission signal - Google Patents
Receiver circuit for transmission signalInfo
- Publication number
- JPS5452406A JPS5452406A JP11967577A JP11967577A JPS5452406A JP S5452406 A JPS5452406 A JP S5452406A JP 11967577 A JP11967577 A JP 11967577A JP 11967577 A JP11967577 A JP 11967577A JP S5452406 A JPS5452406 A JP S5452406A
- Authority
- JP
- Japan
- Prior art keywords
- regenerated
- data signal
- signal
- clock signal
- transmission signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/06—Speed or phase control by synchronisation signals the synchronisation signals differing from the information signals in amplitude, polarity or frequency or length
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To extract a data signal which synchronizes with a clock signal, by supplying a regenerated data signal which has been delayed and a regenerated clock signal to a FF. CONSTITUTION:Receiving a binary clock signal and a signal ternarycoded by a data signal, detector 1 with the lst threshold level regenerates a clock signal and detector 2 with the 2nd threshold level regenerates a data signal. Then, the regenerated data signal after delayed is supplied together with the regenerated clock signal to synchronizing FF4. Consequently, the regenerated data signal is outputted synchronizing with the regenerated clock signal, so that the reproductivity of the data signal can be improved.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11967577A JPS5452406A (en) | 1977-10-03 | 1977-10-03 | Receiver circuit for transmission signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11967577A JPS5452406A (en) | 1977-10-03 | 1977-10-03 | Receiver circuit for transmission signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5452406A true JPS5452406A (en) | 1979-04-25 |
Family
ID=14767260
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11967577A Pending JPS5452406A (en) | 1977-10-03 | 1977-10-03 | Receiver circuit for transmission signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5452406A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5530969U (en) * | 1978-08-23 | 1980-02-28 | ||
FR2652217A1 (en) * | 1989-09-20 | 1991-03-22 | Merlin Gerin | Device for synchronous transmission, especially for an electronic trigger |
JP2010144260A (en) * | 2008-12-16 | 2010-07-01 | Yaskawa Electric Corp | Tension control device |
US7821508B2 (en) | 2005-07-25 | 2010-10-26 | Samsung Electronic Co., Ltd. | Display device and driving device and driving method thereof |
-
1977
- 1977-10-03 JP JP11967577A patent/JPS5452406A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5530969U (en) * | 1978-08-23 | 1980-02-28 | ||
FR2652217A1 (en) * | 1989-09-20 | 1991-03-22 | Merlin Gerin | Device for synchronous transmission, especially for an electronic trigger |
US7821508B2 (en) | 2005-07-25 | 2010-10-26 | Samsung Electronic Co., Ltd. | Display device and driving device and driving method thereof |
JP2010144260A (en) * | 2008-12-16 | 2010-07-01 | Yaskawa Electric Corp | Tension control device |
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