JPS5448472A - Companding pcm coder - Google Patents

Companding pcm coder

Info

Publication number
JPS5448472A
JPS5448472A JP11529177A JP11529177A JPS5448472A JP S5448472 A JPS5448472 A JP S5448472A JP 11529177 A JP11529177 A JP 11529177A JP 11529177 A JP11529177 A JP 11529177A JP S5448472 A JPS5448472 A JP S5448472A
Authority
JP
Japan
Prior art keywords
register
linear
output
pcm coder
dimodulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11529177A
Other languages
Japanese (ja)
Inventor
Yutaka Yamamoto
Hideo Kubota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP11529177A priority Critical patent/JPS5448472A/en
Publication of JPS5448472A publication Critical patent/JPS5448472A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To establish the companding PCM coder with the circuit constitution suitable for LSI, by converting the content of register for non-linear to linear code conversion, and by providing the conversion circuit controlling the switch corresponding to each bit.
CONSTITUTION: The circit 32 sampling and holding the input signal, capacitive element train 28 of which ends are grounded through the second capacitances 26 and 27, and the both ends and the first capacitance 25 junction are respectively connected to the switch 16 selected and connected to the reference power supply 17 and ground 18 through the second capacitors 26 and 27, and which causes the local dimodulating output signal to one end connected in series with the capacitor 25, comparator 29 comparing the amplitude of the local dimodulating output signal to and the sampling holding output, cade register 36 set in a given order according to the output of the comparator 29, and the conversion circuit 38 controlling the switch corresponding to each bit after the non-linear to linear code conversion for the content of the register 36, are provided, and the companding PCM coder with the circuit constitution suitable for large scale integration can be obtained
COPYRIGHT: (C)1979,JPO&Japio
JP11529177A 1977-09-26 1977-09-26 Companding pcm coder Pending JPS5448472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11529177A JPS5448472A (en) 1977-09-26 1977-09-26 Companding pcm coder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11529177A JPS5448472A (en) 1977-09-26 1977-09-26 Companding pcm coder

Publications (1)

Publication Number Publication Date
JPS5448472A true JPS5448472A (en) 1979-04-17

Family

ID=14659012

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11529177A Pending JPS5448472A (en) 1977-09-26 1977-09-26 Companding pcm coder

Country Status (1)

Country Link
JP (1) JPS5448472A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3033915A1 (en) * 1979-09-10 1981-03-12 Hitachi, Ltd., Tokyo PCM DECODER.

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3033915A1 (en) * 1979-09-10 1981-03-12 Hitachi, Ltd., Tokyo PCM DECODER.
DE3033915C2 (en) * 1979-09-10 1985-08-22 Hitachi, Ltd., Tokio/Tokyo PCM decoder.

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