JPS5429341B2 - - Google Patents
Info
- Publication number
- JPS5429341B2 JPS5429341B2 JP13986275A JP13986275A JPS5429341B2 JP S5429341 B2 JPS5429341 B2 JP S5429341B2 JP 13986275 A JP13986275 A JP 13986275A JP 13986275 A JP13986275 A JP 13986275A JP S5429341 B2 JPS5429341 B2 JP S5429341B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9413—Dispositions of bond pads on encapsulations
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50139862A JPS5263672A (en) | 1975-11-20 | 1975-11-20 | Production of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50139862A JPS5263672A (en) | 1975-11-20 | 1975-11-20 | Production of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5263672A JPS5263672A (en) | 1977-05-26 |
| JPS5429341B2 true JPS5429341B2 (online.php) | 1979-09-22 |
Family
ID=15255262
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50139862A Granted JPS5263672A (en) | 1975-11-20 | 1975-11-20 | Production of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5263672A (online.php) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6426564B1 (en) * | 1999-02-24 | 2002-07-30 | Micron Technology, Inc. | Recessed tape and method for forming a BGA assembly |
| US7361531B2 (en) * | 2005-11-01 | 2008-04-22 | Allegro Microsystems, Inc. | Methods and apparatus for Flip-Chip-On-Lead semiconductor package |
| EP3300105B1 (de) * | 2016-09-26 | 2022-07-13 | Infineon Technologies AG | Leistungshalbleitermodul und verfahren zur herstellung eines leistungshalbleitermoduls |
-
1975
- 1975-11-20 JP JP50139862A patent/JPS5263672A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5263672A (en) | 1977-05-26 |