JPS5425147A - Flip flop circuit - Google Patents

Flip flop circuit

Info

Publication number
JPS5425147A
JPS5425147A JP9068577A JP9068577A JPS5425147A JP S5425147 A JPS5425147 A JP S5425147A JP 9068577 A JP9068577 A JP 9068577A JP 9068577 A JP9068577 A JP 9068577A JP S5425147 A JPS5425147 A JP S5425147A
Authority
JP
Japan
Prior art keywords
flip flop
flop circuit
improve
circuit
const
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9068577A
Other languages
Japanese (ja)
Inventor
Kazuhiko Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9068577A priority Critical patent/JPS5425147A/en
Publication of JPS5425147A publication Critical patent/JPS5425147A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356086—Bistable circuits with additional means for controlling the main nodes
    • H03K3/356095—Bistable circuits with additional means for controlling the main nodes with synchronous operation

Abstract

PURPOSE:To improve the yield, to reduce the const, and to improve electric characteristics, by forming a FF circuit, which operates by a slight potential difference, of an extremely small number, i.e. five of elements.
JP9068577A 1977-07-27 1977-07-27 Flip flop circuit Pending JPS5425147A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9068577A JPS5425147A (en) 1977-07-27 1977-07-27 Flip flop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9068577A JPS5425147A (en) 1977-07-27 1977-07-27 Flip flop circuit

Publications (1)

Publication Number Publication Date
JPS5425147A true JPS5425147A (en) 1979-02-24

Family

ID=14005383

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9068577A Pending JPS5425147A (en) 1977-07-27 1977-07-27 Flip flop circuit

Country Status (1)

Country Link
JP (1) JPS5425147A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6190878U (en) * 1984-11-20 1986-06-12
EP0208186A2 (en) * 1985-06-28 1987-01-14 Itt Industries, Inc. A balanced enhancement/depletion mode gallium/arsenide buffer/comparator circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6190878U (en) * 1984-11-20 1986-06-12
EP0208186A2 (en) * 1985-06-28 1987-01-14 Itt Industries, Inc. A balanced enhancement/depletion mode gallium/arsenide buffer/comparator circuit
EP0208186A3 (en) * 1985-06-28 1989-02-01 Itt Industries, Inc. A balanced enhancement/depletion mode gallium/arsenide buffer/comparator circuit

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