JPS5421245A - Phase synchronous circuit - Google Patents

Phase synchronous circuit

Info

Publication number
JPS5421245A
JPS5421245A JP8692077A JP8692077A JPS5421245A JP S5421245 A JPS5421245 A JP S5421245A JP 8692077 A JP8692077 A JP 8692077A JP 8692077 A JP8692077 A JP 8692077A JP S5421245 A JPS5421245 A JP S5421245A
Authority
JP
Japan
Prior art keywords
phase synchronous
synchronous circuit
circuit
phase
syncrhronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8692077A
Other languages
Japanese (ja)
Other versions
JPS586417B2 (en
Inventor
Yasuhiro Fujita
Onori Murakami
Shiro Mizutani
Kazuyuki Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP52086920A priority Critical patent/JPS586417B2/en
Publication of JPS5421245A publication Critical patent/JPS5421245A/en
Publication of JPS586417B2 publication Critical patent/JPS586417B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/54—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving generating subcarriers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00—Demodulation of amplitude-modulated oscillations
    • H03D1/22—Homodyne or synchrodyne circuits
    • H03D1/2209—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
    • H03D1/2236—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders using a phase locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Stereophonic System (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To enable to perform normal demodulation operation without distortion in oscillation frequency due to greater audio signals, by connecting a complementary transistor switch circuit to the phase syncrhronous circuit demodulating stereo multiplex signals.
JP52086920A 1977-07-19 1977-07-19 phase synchronized circuit Expired JPS586417B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52086920A JPS586417B2 (en) 1977-07-19 1977-07-19 phase synchronized circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52086920A JPS586417B2 (en) 1977-07-19 1977-07-19 phase synchronized circuit

Publications (2)

Publication Number Publication Date
JPS5421245A true JPS5421245A (en) 1979-02-17
JPS586417B2 JPS586417B2 (en) 1983-02-04

Family

ID=13900282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52086920A Expired JPS586417B2 (en) 1977-07-19 1977-07-19 phase synchronized circuit

Country Status (1)

Country Link
JP (1) JPS586417B2 (en)

Also Published As

Publication number Publication date
JPS586417B2 (en) 1983-02-04

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