JPS586417B2 - phase synchronized circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase-locked loop circuit (PLL circuit) used for demodulating stereo multiplex signals, and particularly to a voltage-controlled oscillation circuit thereof. Conventionally, a phase-locked circuit that demodulates a stereo multiplex signal uses the output of a phase comparison circuit to control the oscillation frequency of a voltage-controlled oscillator for demodulation. Signal (1 9
KHz) has an amplitude only about 10 times that of an audio signal,
However, since the audio signal exists very close to the pilot signal, the oscillation frequency of the voltage controlled oscillator may be phase-tuned by a large amount than the predetermined value, that is, 19 KHz, due to a large audio signal. There was a drawback that demodulation operation could not be performed.

The present invention is a phase-locked circuit that eliminates the above-mentioned drawbacks, and is capable of obtaining a signal that is always stable and phase-tuned to a desired frequency without being affected by audio signals in the vicinity of the pilot signal. This is a proposal.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be sequentially explained below along with embodiments according to the drawings.

The figure is a circuit diagram showing an embodiment of the phase locked circuit of the present invention.

A 19 KHz stereo pilot signal in the multiplex stereo signal that has passed through the LC filter circuit is input to the input terminal 1 in a slightly emphasized state.

The input terminal 1 is connected to the base of a transistor 20 constituting the input section of the phase comparison circuit, and therefore the pilot signal is applied to the base of the transistor 20.

Transistor 3 and transistor 2 constitute a differential amplifier, and this differential amplifier has a desired dynamic range and mutual conductance with emitter resistors 4 and 5, and transistor 6 and resistor 7 that form a constant current source. determined.

The collector currents of the transistors 2.3 are respectively supplied as common emitter currents of switches having a differential amplification configuration (hereinafter referred to as differential switches) composed of transistors 8 and 9 and transistors 10 and 11.

The bases of transistors 8, 11 and 9, 10 are connected in common, and a 19 KHz signal obtained by dividing the signal from voltage controlled oscillator 12 is applied to each common base with opposite polarity.

Among the transistors constituting the differential switch, the collectors of transistors 8 and 10 are commonly connected, and this collector current flows through transistors 13 and 14 and resistors 15 and 16.
．． 17, and the output current of the first current mirror circuit is further made up of transistors 18, 19 and resistors 20, 21, and 22, which have the opposite polarity to this circuit. This becomes the input current of the second current mirror circuit.

By providing two current mirror circuits in this manner, a large dynamic range can be set.

On the other hand, the collector currents of transistors 9 and 11 of the transistors constituting the differential switch are controlled by transistors 23 and 24 and resistors 25, 26, and 27 in the same manner as described above.
The output current of the third current mirror circuit is combined with the output current of the second current mirror circuit and appears at the terminal 28.

That is, a detection signal obtained by comparing the phases of the 19 KHZ signal obtained from the voltage controlled oscillator 12 and the pilot signal applied to the input terminal 1 appears at the terminal 28.

A low-pass filter circuit consisting of capacitors 29 and 29' and resistors 30 and 31 is connected to terminal 28 for smoothing the detected signal.

The phase detection signal smoothed via the resistor 31 is transmitted to the terminal 32.

A constant current source resistor or variable resistor 33 is connected between the terminal 32 and the ground point, and this variable resistor 33 determines the current value to be supplied to the voltage controlled oscillator, which will be described in detail later. .

This current value is one element that determines the oscillation frequency of the oscillator.

The oscillation frequency of the oscillator is proportional to the collector current of transistor 34.

The emitter potential of the transistor 34 is
37, the base potential of the transistor 35 is kept equal to the base potential of the transistor 35, and the terminal 3
2 is the constant potential point of the constant current source.

Therefore, when the voltage appearing at terminal 28 is equal to the voltage at terminal 32, the collector current of transistor 34 is
is determined by the voltage of the variable resistor 33 and the value of the variable resistor 33.

Further, if the voltage at the terminal 28 is greater than the voltage at the terminal 32, the collector current of the transistor 34 decreases, and conversely, if the voltage at the terminal 28 is lower than the voltage at the terminal 32, the collector current of the transistor 34 increases.

That is, the oscillation frequency increases or decreases in response to the voltage appearing at the terminal 28, that is, the voltage of the smoothed detection signal.

Next, the operation of the voltage controlled oscillator will be explained.

The oscillation operation is performed by charging and discharging the capacitor 38. During the charging period of the capacitor 38, the collector current of the transistor 34 flows to the transistor 39 of the transistors 39, 40 forming the differential swing, and the collector current flows to the transistor 39 of the transistors 39, 40 forming the differential swing. 42 and a current mirror circuit composed of resistors 43, 44, and 45.
to charge.

At this time, the base potential of the transistor 460 is lower than the base potential of the transistor 47 that constitutes a differential amplification circuit, and the collector current of the transistor 460 does not flow, and the collector current of the transistor 48 also does not flow.

Therefore, the transistor 470 is cut off, keeping the base potential of transistor 470 high.

By the way, in this state, a voltage approximately equal to the base voltage of the transistor 470 is applied to the transistor 51 via the resistor 50.
0 base, so the transistor 52 becomes conductive.

Therefore, the base potential of transistor 40 is held on the low side.

If transistor 52 is in a conductive state, transistor 53
The current is cut off, and the potential of the transistor 390 is held on the high side.

This circuit state continues until the voltage charged in the capacitor 38 approaches the base potential of the transistor 470 and the collector current of the transistor 46 begins to flow.

The charging voltage of capacitor 38 increases and transistor 46
When the collector current begins to flow, current flows through the diode Di and the transistor 48, making the transistor 49 conductive.

When the transistor 49 becomes conductive, the base potential of the transistor 470 decreases, and the transistor 46 is turned on and the transistor 47 is accelerated and reversed to the cathoto-off state.

Further, when the transistor 49 becomes conductive, the base potential of the transistor 510 becomes low and the transistor 52 also turns off.

When transistor 52 is turned off, transistor 4
The base potential of transistor 39 becomes high, transistor 52 becomes conductive, and the base potential of transistor 39 decreases. Transistor 40 becomes conductive, and transistor 39 is turned off.

Therefore, the collector voltage of transistor 34 flows only to transistor 40, and the collector current of transistor 40 acts to draw out the charge stored in capacitor 38.

That is, the terminal voltage of the capacitor 38 begins to fall.

In this state, the terminal voltage of the co/capacitor 38 is
70 base voltage, that is, stable power supply voltage, by resistor 5
The voltage decreases to the voltage divided by 0 and 54, and continues until the collector current of the transistor 47 begins to flow. When the transistor 47 becomes conductive, the state of the circuit returns to the initial state and one cycle is completed.

In this way, a triangular waveform is generated at the terminal 55 to which the capacitor 38 is connected, and a voltage that can be regarded as a substantially rectangular wave appears at the collector of the transistor 53.

In addition, the base transistor 360 of the transistor 34
The base is connected to a NiHa capacitor 56 and a resistor 57 to provide accurate negative feedback and eliminate instability of oscillation.

By the way, if a transistor 58 is connected to the collector of the transistor 36 and a switching signal for switching from the FM receiving state to the AM receiving state is applied to the base of the transistor 58, for example, the transistor 34 is forced to turn off. , the operation of the oscillator can be prevented from affecting AM reception.

From the voltage controlled oscillator, the current value flowing through the resistor 33,
A 76 KHz signal set by the capacitance value of the capacitor 38 and the switching voltage value of the transistor 46 is output, and normally it passes through a two-stage frequency dividing circuit and becomes a 19 KHz oscillation signal (signal shown as the oscillator 12). However, this 19KHz oscillation signal and the pilot signal (standard 19KHz) included in the multiplex stereo signal
are phase-compared as described above, and the phase comparison detection output is applied to the oscillator, so phase synchronization is applied and the oscillator's 19
The KHz oscillation output is stabilized with a phase shift of 90° from the pilot signal.

Now, the multiplex stereo signal includes the pilot signal, the (L-R) signal modulated at 39KHz,
A normal (L+R) signal is included.

Since the (L-R) signal and (L+R) signal are basically audio signals, their frequency components range from several tens of Hz to 15 KH.
It is distributed up to about z.

Therefore, it is the same as the presence of interference signal components close to the pilot signal.

Moreover, this interference signal component has a level that is at most 10 times higher than that of the pilot signal.

Therefore, in the worst case, there is a risk that the oscillator may malfunction in synchronization with the audio signal.

In the present invention, a complementary transistor switch circuit consisting of transistors 59 and 60 is provided at terminal 28, and the above-mentioned disadvantage can be eliminated by the action of this circuit.

The base voltage of transistors 59 and 60 is applied to resistors 61 and 6.
2 and 63, the bias power supply voltage applied to the terminal 64 is divided and applied.

On the other hand, this bias power supply voltage is divided by a resistance divider circuit consisting of resistors 65 and 66, and is also applied to the base of the transistor 35.

Therefore, the ratio between the value of the resistor 61 and the value of the resistor 65 is set as
By making it equal to the ratio of the value of 3 and the value of resistor 66,
The potential of neutral point C, which is the emitter connection point of transistors 59 and 60 forming a complementary transistor pinch circuit, can be made equal to the potential of transistor 350.

Since the base potential of the transistor 350 is equal to the emitter potential of the transistor 34 as described above, the potential of the neutral point C can be made equal to the emitter potential of the transistor 34.

Here, when trying to synchronize to a 15KHz interference signal (audio signal) in a general phase synchronization circuit 75ζ multiplex stereo signal, the phase comparison circuit generates 19KHz.
Since it is compared with the oscillation signal of the circuit, the output current from the same circuit increases.

The emitter potential of the transistor 34 is constant and the resistor 3
Since the current flowing through transistor 34 is a constant current, as the output current of the phase comparison circuit increases, the current flowing through transistor 34 decreases, working to lower the oscillation frequency of the voltage controlled oscillator, that is, to synchronize it to 15 KHz.

However, in the present invention, since the neutral point C of the complementary transistor switch circuit is connected to the output point of the phase comparison circuit, the output current of the phase comparison circuit increases and the voltage drop across the resistor 31 becomes large. When the potential of the resistor 28 rises, the transistor 60 of the transistor switch circuit becomes conductive and absorbs a portion of the current supplied to the resistor 31 in response to the increased potential.

Therefore, a very large current does not flow through the resistor 31, and the oscillation frequency of the oscillator is not greatly disturbed, so that it is not synchronized with the interference signal.

The above is a case where synchronization is attempted to a frequency lower than 19 KHz, but if an attempt is made to synchronize to a frequency higher than 19 KHz, the transistor 59 becomes conductive due to the opposite effect to the above, and the phase comparator circuit This output current is released from this transistor 59, so that the oscillation frequency is not synchronized at high frequencies.

Furthermore, in this embodiment, the reference voltage of the oscillator can be set to an accurate value by setting the values of the resistors 65 and 66.
, 62, and 63, the upper limit, lower limit, and center value of the output current of the phase comparator circuit can be arbitrarily selected. Therefore, the permissible range of synchronization can be accurately determined to a predetermined value.

As explained above, the phase synchronized circuit of the present invention does not cause the oscillation frequency of the voltage controlled oscillator to be greatly disturbed by the interference signal, which is a large audio signal that exists near the pilot signal, and can always perform accurate demodulation operation. I can do it.

[Brief explanation of the drawing]

The figure is a circuit diagram showing an embodiment of the phase locked circuit of the present invention. 1...Multiplex stereo signal application terminal, 2...Transistor for input section of phase comparison circuit, 3...Transistor for differential amplification, 8-11...
...Transistor for differential switch configuration, 12...
・Voltage controlled oscillator, 13, 14, 18, 19, 23,
24, 41, 42...Transistor for cant mirror circuit configuration, 13-17.20-22.25-27
, 43-45... Resistor for current mirror circuit configuration, 29.29'... Capacitor for low-pass filter circuit configuration, 30, 31... Resistor for low-pass filter configuration, 32... Constant potential point, 33...
・Resistance for constant current source, 34-37... Transistor for feedback amplifier configuration, 38... Capacitor for oscillation, 39, 40, 46, 47... Differential Transistor for switch configuration, 48, 49.51-53...
...Transistor for oscillation control, 50, 54...
... Voltage division resistor, 55 ... Capacitor 38
Terminal to be connected, 56... Capacitor for feedback stabilization, 57... Resistor for feedback stabilization, 58...
・・AM, FM switching transistor, 59, 60・
...Transistor for complementary transistor switch circuit, 61-63... Resistor for complementary transistor switch circuit, 64... Bias power supply voltage application terminal, C...・Neutral point, Di...Diode.

Claims (1)

[Claims] 1 An input terminal is connected to the current output terminal of the phase comparison circuit and the same phase comparison circuit, a constant current source resistor is connected to the output terminal and the connection point, and the output terminal is connected to the constant potential point of the constant current source. to the current output terminal of the phase-locked circuit consisting of a loop of a low-pass filter and a voltage-controlled oscillator;
A first transistor of unipolar polarity, the collector of which is connected to one of the bias power supply terminals, and a second transistor of opposite polarity, the emitter of which is coupled to the emitter of the same transistor, and the collector of which is connected to the other of the bias power supply terminals. The emitter common connection point of the complementary transistor switch circuit is read directly, and the paces of the first and second transistors are connected to one and the other of the bias power supply terminals via a resistor, respectively, and the bases of both transistors are connected to each other through a resistor. The transistors are connected through a resistor, and one of the first and second transistors is made conductive by increasing or decreasing the current output terminal based on an increase or decrease in the output current of the phase comparator circuit, thereby controlling the sinking or releasing of the output current. A phase-locked circuit characterized by: