JPS5419630A - Video signal processing circuit - Google Patents

Video signal processing circuit

Info

Publication number
JPS5419630A
JPS5419630A JP8425377A JP8425377A JPS5419630A JP S5419630 A JPS5419630 A JP S5419630A JP 8425377 A JP8425377 A JP 8425377A JP 8425377 A JP8425377 A JP 8425377A JP S5419630 A JPS5419630 A JP S5419630A
Authority
JP
Japan
Prior art keywords
video signal
signal processing
processing circuit
bits
picking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8425377A
Other languages
Japanese (ja)
Other versions
JPS623630B2 (en
Inventor
Kiyoshi Nakagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP8425377A priority Critical patent/JPS5419630A/en
Publication of JPS5419630A publication Critical patent/JPS5419630A/en
Publication of JPS623630B2 publication Critical patent/JPS623630B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Image Input (AREA)
  • Image Processing (AREA)
  • Facsimile Scanning Arrangements (AREA)

Abstract

PURPOSE:To constitute a circuit having greater noise margin of high speed oepration an high accuracy, by individually picking up the video signal of an add and even number of bit throygh sequentially switching the photo electric conversion element constituting plural number of bits and by picking up output through logical sum of the binary output for the both bits.
JP8425377A 1977-07-15 1977-07-15 Video signal processing circuit Granted JPS5419630A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8425377A JPS5419630A (en) 1977-07-15 1977-07-15 Video signal processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8425377A JPS5419630A (en) 1977-07-15 1977-07-15 Video signal processing circuit

Publications (2)

Publication Number Publication Date
JPS5419630A true JPS5419630A (en) 1979-02-14
JPS623630B2 JPS623630B2 (en) 1987-01-26

Family

ID=13825287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8425377A Granted JPS5419630A (en) 1977-07-15 1977-07-15 Video signal processing circuit

Country Status (1)

Country Link
JP (1) JPS5419630A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61258563A (en) * 1985-05-13 1986-11-15 Fuji Xerox Co Ltd Image reader

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4883738A (en) * 1972-01-20 1973-11-08
JPS50138715A (en) * 1974-04-22 1975-11-05
JPS5250113A (en) * 1975-10-21 1977-04-21 Oki Electric Ind Co Ltd Picture electric transmission system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4883738A (en) * 1972-01-20 1973-11-08
JPS50138715A (en) * 1974-04-22 1975-11-05
JPS5250113A (en) * 1975-10-21 1977-04-21 Oki Electric Ind Co Ltd Picture electric transmission system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61258563A (en) * 1985-05-13 1986-11-15 Fuji Xerox Co Ltd Image reader

Also Published As

Publication number Publication date
JPS623630B2 (en) 1987-01-26

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