JPS54163629A - Display terminal unit - Google Patents

Display terminal unit

Info

Publication number
JPS54163629A
JPS54163629A JP1826779A JP1826779A JPS54163629A JP S54163629 A JPS54163629 A JP S54163629A JP 1826779 A JP1826779 A JP 1826779A JP 1826779 A JP1826779 A JP 1826779A JP S54163629 A JPS54163629 A JP S54163629A
Authority
JP
Japan
Prior art keywords
terminal unit
display terminal
display
unit
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1826779A
Other languages
Japanese (ja)
Inventor
Jiyon Matsushiareri Furanshisu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DEETA GEN CORP
Original Assignee
DEETA GEN CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by DEETA GEN CORP filed Critical DEETA GEN CORP
Publication of JPS54163629A publication Critical patent/JPS54163629A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/001—Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Digital Computer Display Output (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)
JP1826779A 1978-02-21 1979-02-19 Display terminal unit Pending JPS54163629A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US87937378A 1978-02-21 1978-02-21

Publications (1)

Publication Number Publication Date
JPS54163629A true JPS54163629A (en) 1979-12-26

Family

ID=25374023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1826779A Pending JPS54163629A (en) 1978-02-21 1979-02-19 Display terminal unit

Country Status (3)

Country Link
JP (1) JPS54163629A (en)
DE (1) DE2905658A1 (en)
GB (1) GB2016757A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60173580A (en) * 1984-02-20 1985-09-06 株式会社アスキ− Display controller
CA2065979C (en) * 1991-06-10 1999-01-19 Stephen Patrick Thompson Mode dependent minimum fifo fill level controls processor access to video memory
CN114785445B (en) * 2022-06-20 2022-09-09 中国空气动力研究与发展中心低速空气动力研究所 Clock synchronization implementation method of wind tunnel pressure measurement system

Also Published As

Publication number Publication date
DE2905658A1 (en) 1979-08-30
GB2016757A (en) 1979-09-26

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