JPS54161269A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPS54161269A
JPS54161269A JP7007678A JP7007678A JPS54161269A JP S54161269 A JPS54161269 A JP S54161269A JP 7007678 A JP7007678 A JP 7007678A JP 7007678 A JP7007678 A JP 7007678A JP S54161269 A JPS54161269 A JP S54161269A
Authority
JP
Japan
Prior art keywords
lead frame
arrayed
probe
manufacture
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7007678A
Other languages
Japanese (ja)
Inventor
Hiroshi Yokota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7007678A priority Critical patent/JPS54161269A/en
Publication of JPS54161269A publication Critical patent/JPS54161269A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Abstract

PURPOSE: To miniaturize a lead frame by arraying a group of checking electrodes on a flexible film in the longish direction and in more than two lines.
CONSTITUTION: In a pattern region arranged on a flexible film, ten checking electrode pads 5 are arrayed in two lines. Since pad center interval (f) can be made approximately 1.4mm by manufacture, the manufacture of a probe is simplified and there is no need to reduce pads in width. Defective contact between a pad and the probe can therefore be prevented. At this time, widths (d) and (e) are made approximately 0.7mm. As a result, more elctrodes 5 can be arrayed in a fixed region and even if the number of electrodes of the semiconductor pellet increases, the lead frame can be miniaturized.
COPYRIGHT: (C)1979,JPO&Japio
JP7007678A 1978-06-09 1978-06-09 Lead frame for semiconductor device Pending JPS54161269A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7007678A JPS54161269A (en) 1978-06-09 1978-06-09 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7007678A JPS54161269A (en) 1978-06-09 1978-06-09 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPS54161269A true JPS54161269A (en) 1979-12-20

Family

ID=13421081

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7007678A Pending JPS54161269A (en) 1978-06-09 1978-06-09 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS54161269A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63306633A (en) * 1987-06-08 1988-12-14 Toshiba Corp Film carrier

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5299769A (en) * 1976-02-18 1977-08-22 Toshiba Corp Pellet for semiconductor device
JPS52144768A (en) * 1976-05-27 1977-12-02 Fujitsu Ltd Method of connecting chip

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5299769A (en) * 1976-02-18 1977-08-22 Toshiba Corp Pellet for semiconductor device
JPS52144768A (en) * 1976-05-27 1977-12-02 Fujitsu Ltd Method of connecting chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63306633A (en) * 1987-06-08 1988-12-14 Toshiba Corp Film carrier
JPH057868B2 (en) * 1987-06-08 1993-01-29 Tokyo Shibaura Electric Co

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