JPS54157023A - Time division communication system - Google Patents
Time division communication systemInfo
- Publication number
- JPS54157023A JPS54157023A JP6545178A JP6545178A JPS54157023A JP S54157023 A JPS54157023 A JP S54157023A JP 6545178 A JP6545178 A JP 6545178A JP 6545178 A JP6545178 A JP 6545178A JP S54157023 A JPS54157023 A JP S54157023A
- Authority
- JP
- Japan
- Prior art keywords
- information
- transmission
- line
- distributing frame
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
Abstract
PURPOSE:To make it possible to use a clock adapted to every subscriber to be used by separating a master distributing frame of the transmission side and that of the receiving side in space to eliminate the short distance crosstalk on the communication system where information is transmitted and received in the two-wire time division system. CONSTITUTION:Transmission-side master distributing frame 7 and receiving-side master distributing frame 8 which transmit and receive information by two-wires, which accomodate two-wire transmitting line 4 to transmit information to subscriber terminals 2 and 3 and two-wire reciving line 6 to receive information from subscriber terminals 2 and 3 and are separated in space, are provided, and terminals 2 and 3 are connected by two-wire inter-subscriber connection line 5. Then, transmission information to terminals 2 and 3 is subjected to time division multiplexing, and transmission signals are transmitted to transmission line 4 through master distributing frame 7, and assigned information is received in terminal 2. Then, the transmission information is inserted into an assigned channel and is transmitted to terminal 3 through line 5, and information is received in terminal 3, and the transmission information is sent to receiving-side master distributing frome 8 of exchange 1 through line 6, thus transmitting information inputted to switchboard 9 to terminal 2 through master distributing frame 7.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6545178A JPS54157023A (en) | 1978-05-31 | 1978-05-31 | Time division communication system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6545178A JPS54157023A (en) | 1978-05-31 | 1978-05-31 | Time division communication system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54157023A true JPS54157023A (en) | 1979-12-11 |
Family
ID=13287510
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6545178A Pending JPS54157023A (en) | 1978-05-31 | 1978-05-31 | Time division communication system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54157023A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5959223A (en) * | 1995-05-02 | 1999-09-28 | Kabushiki Kaisha Kawai Gakki Seisakusho | Method of assembling an upright piano |
-
1978
- 1978-05-31 JP JP6545178A patent/JPS54157023A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5959223A (en) * | 1995-05-02 | 1999-09-28 | Kabushiki Kaisha Kawai Gakki Seisakusho | Method of assembling an upright piano |
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