JPS54156457A - Automatic gain control circuit - Google Patents

Automatic gain control circuit

Info

Publication number
JPS54156457A
JPS54156457A JP6513278A JP6513278A JPS54156457A JP S54156457 A JPS54156457 A JP S54156457A JP 6513278 A JP6513278 A JP 6513278A JP 6513278 A JP6513278 A JP 6513278A JP S54156457 A JPS54156457 A JP S54156457A
Authority
JP
Japan
Prior art keywords
output
converter
conversion
amplifier
gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6513278A
Other languages
Japanese (ja)
Inventor
Shigeru Asakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6513278A priority Critical patent/JPS54156457A/en
Publication of JPS54156457A publication Critical patent/JPS54156457A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To establish the AGC circuit effective to wired communication, by detecting the output of the variable gain amplifier, comparing and discriminating it with the reference signal level, and giving the signal in A/D conversion for the output to the set gain value of the amplifier with partial D/A conversion. CONSTITUTION:The input signal is amplified 2 via the variable gain amplifier 1, outputted and detected 3. The output of the detector 3 is compared and discriminated with the reference voltage A at the comparison circuit 4, and the error signal is DC-amplified 5 and converted into a digital value at the A/D converter 6. The partial D/A converter is provided in the converter 6, and analog signal value converted is fed to the variable gain amplifier 1 as the gain control value to control the gain. When the output of the comparison circuit 4 is stable, the A/D conversion of the converter 6 is stopped, the D/A conversion output is held constant at the sampling hold circuit to control the amplifier 1. Accordingly, if the transmission condition is once determined, since the setting of the reception gain is easily preset and it is stably held until the specified information communication is finished, it is effective to the facsimile communication.
JP6513278A 1978-05-31 1978-05-31 Automatic gain control circuit Pending JPS54156457A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6513278A JPS54156457A (en) 1978-05-31 1978-05-31 Automatic gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6513278A JPS54156457A (en) 1978-05-31 1978-05-31 Automatic gain control circuit

Publications (1)

Publication Number Publication Date
JPS54156457A true JPS54156457A (en) 1979-12-10

Family

ID=13278033

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6513278A Pending JPS54156457A (en) 1978-05-31 1978-05-31 Automatic gain control circuit

Country Status (1)

Country Link
JP (1) JPS54156457A (en)

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