JPS54154978A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS54154978A
JPS54154978A JP6455678A JP6455678A JPS54154978A JP S54154978 A JPS54154978 A JP S54154978A JP 6455678 A JP6455678 A JP 6455678A JP 6455678 A JP6455678 A JP 6455678A JP S54154978 A JPS54154978 A JP S54154978A
Authority
JP
Japan
Prior art keywords
film
region
channel region
drain
density
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6455678A
Other languages
Japanese (ja)
Inventor
Tadao Yoneda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6455678A priority Critical patent/JPS54154978A/en
Publication of JPS54154978A publication Critical patent/JPS54154978A/en
Pending legal-status Critical Current

Links

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To increase the dielectric strength as well as to decrease the noise by securing a high impurity at the both ends and a low density at the center respectively for the channel region to be provided between the source and the drain of the J-FET and then forming covering over the low-density region and the high-density region of the drain side.
CONSTITUTION: SiO2 film 21 is coated on P-type Si substrate 20, and this film is removed on the channel region to form SiO2 film 22 there. Then Si3N4 film 23 and SiO2 film 24 are coated in lamination over the entire surface. Photo resist film 25 is provided at the concave part caused on the channel region, and film 23 and 24 exposed at the concave part are removed by etching with film 25 used as the mask. After this, film 25 is removed to form by ion injection within the concave part N+ source-side channel region 28, central channel region 27 and drain-side channel region 28' featuring a high, low and high impurity density respectively. These regions are then converted to deep regions 31, 30 and 31' each through the heat treatment, and gate region 35 is formed covering over region 30 and 31' with N+- type source and drain region 32 and 33 formed by diffusion at both sides of region 35.
COPYRIGHT: (C)1979,JPO&Japio
JP6455678A 1978-05-29 1978-05-29 Manufacture of semiconductor device Pending JPS54154978A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6455678A JPS54154978A (en) 1978-05-29 1978-05-29 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6455678A JPS54154978A (en) 1978-05-29 1978-05-29 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS54154978A true JPS54154978A (en) 1979-12-06

Family

ID=13261612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6455678A Pending JPS54154978A (en) 1978-05-29 1978-05-29 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS54154978A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6396962A (en) * 1986-10-13 1988-04-27 Nec Corp Fieid-effect transistor and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6396962A (en) * 1986-10-13 1988-04-27 Nec Corp Fieid-effect transistor and manufacture thereof

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