JPS54154924A - Frequency division multiplication converter - Google Patents

Frequency division multiplication converter

Info

Publication number
JPS54154924A
JPS54154924A JP6363978A JP6363978A JPS54154924A JP S54154924 A JPS54154924 A JP S54154924A JP 6363978 A JP6363978 A JP 6363978A JP 6363978 A JP6363978 A JP 6363978A JP S54154924 A JPS54154924 A JP S54154924A
Authority
JP
Japan
Prior art keywords
fdm
frequency division
modulators
amplifier
division multiplication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6363978A
Other languages
Japanese (ja)
Inventor
Dan Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6363978A priority Critical patent/JPS54154924A/en
Publication of JPS54154924A publication Critical patent/JPS54154924A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J1/00—Frequency-division multiplex systems
    • H04J1/02—Details
    • H04J1/04—Frequency-transposition arrangements

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To decrease the types and number of the amplifiers by using the amplifier which is capable of amplifying up to the frequency division multiplication (FDM) signal of the final step. CONSTITUTION:The FDM signals of the 1st step applied to input terminals SG1- SGn are then applied to modulators 11-14 to modulate the different carrrier waves. The output signals of these modulators are applied to filters 21-25 to remove the undesired side bands and leaked carrier waves, and then combined to the coupling circuit. The output signals are then amplified by amplifier 3 which can perform amplification up to the frequency band of the 3rd-step FDM signal obtained by multiplying further the 2nd-step FDM signal which is the output of coupling ciruit 7.
JP6363978A 1978-05-26 1978-05-26 Frequency division multiplication converter Pending JPS54154924A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6363978A JPS54154924A (en) 1978-05-26 1978-05-26 Frequency division multiplication converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6363978A JPS54154924A (en) 1978-05-26 1978-05-26 Frequency division multiplication converter

Publications (1)

Publication Number Publication Date
JPS54154924A true JPS54154924A (en) 1979-12-06

Family

ID=13235118

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6363978A Pending JPS54154924A (en) 1978-05-26 1978-05-26 Frequency division multiplication converter

Country Status (1)

Country Link
JP (1) JPS54154924A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50111911A (en) * 1974-02-12 1975-09-03

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50111911A (en) * 1974-02-12 1975-09-03

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