JPS54152407A - Circuit assignment control system of time-division multiple network - Google Patents

Circuit assignment control system of time-division multiple network

Info

Publication number
JPS54152407A
JPS54152407A JP6076778A JP6076778A JPS54152407A JP S54152407 A JPS54152407 A JP S54152407A JP 6076778 A JP6076778 A JP 6076778A JP 6076778 A JP6076778 A JP 6076778A JP S54152407 A JPS54152407 A JP S54152407A
Authority
JP
Japan
Prior art keywords
transmission
time
rate
requests
division multiple
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6076778A
Other languages
Japanese (ja)
Inventor
Kazuo Matsuoka
Noriaki Fujimura
Tomohito Shibata
Shigeru Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6076778A priority Critical patent/JPS54152407A/en
Publication of JPS54152407A publication Critical patent/JPS54152407A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/50—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication
    • H04L12/52—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques
    • H04L12/525—Circuit switching systems, i.e. systems in which the path is physically permanent during the communication using time division techniques involving a stored program control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE:To improve transmission efficiency by allowing transmitting information of the same transmission rate, queued in a group of transmission requests, to stand by on a data buffer. CONSTITUTION:The common divisor of a transmission rate which corresponds to a transmission request from a terminal is regarded as a unit rate and on the basis of the unit rate, times slots on time-division multiple circuits 21...26 are assigned to respective terminals at the same transmission speed. Then, time-division multiplexers 2-0, 2-1 and 2-2 allocate transmitting informaton equivalent to each transmission request to an idle time slot among time slots assgined to terminals and then allows transmitting information of the same transmission rate, queued in a group of transmissiin requests, to stand by on a data buffer. Consequently, even if transmission requests of different rates coexist, they can be sent in sequence unless there is an idle time slot, thereby improving the transmission efficiency.
JP6076778A 1978-05-22 1978-05-22 Circuit assignment control system of time-division multiple network Pending JPS54152407A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6076778A JPS54152407A (en) 1978-05-22 1978-05-22 Circuit assignment control system of time-division multiple network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6076778A JPS54152407A (en) 1978-05-22 1978-05-22 Circuit assignment control system of time-division multiple network

Publications (1)

Publication Number Publication Date
JPS54152407A true JPS54152407A (en) 1979-11-30

Family

ID=13151748

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6076778A Pending JPS54152407A (en) 1978-05-22 1978-05-22 Circuit assignment control system of time-division multiple network

Country Status (1)

Country Link
JP (1) JPS54152407A (en)

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