JPS54151361A - Delay trigger pulse generation circuit - Google Patents

Delay trigger pulse generation circuit

Info

Publication number
JPS54151361A
JPS54151361A JP5806078A JP5806078A JPS54151361A JP S54151361 A JPS54151361 A JP S54151361A JP 5806078 A JP5806078 A JP 5806078A JP 5806078 A JP5806078 A JP 5806078A JP S54151361 A JPS54151361 A JP S54151361A
Authority
JP
Japan
Prior art keywords
trt
time
trigger pulse
delay
delay trigger
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5806078A
Other languages
Japanese (ja)
Inventor
Koichi Yamada
Toshiomi Yabu
Tatsuo Wada
Tadashi Yoshino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5806078A priority Critical patent/JPS54151361A/en
Publication of JPS54151361A publication Critical patent/JPS54151361A/en
Pending legal-status Critical Current

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  • Pulse Circuits (AREA)

Abstract

PURPOSE: To obtain the circuit suitable for IC, by enabling to set the delay time, delay trigger pulse width with the time constant of the time set circuit with a simple circuit constitution.
CONSTITUTION: The first and second NOR gates are constituted with transistors TrT1, T2, T3 and T4. If the signal inputted from the terminal IN is in H level, the junction of TrT1 and T2 is at L level, and charging is made to the capacitor C1 via the resistor R6. When the potential across C1 reaches the reference voltage source applied to the base of TrT8, TrT3 is OFF, T7, T9, T3 are ON, and T1 is OFF. Further, T5, T6 are ON to discharge C1, and the delay time of the output signal of the monostable multivibrator of T3, T4 is determined with the time constant of charging of C1. Further, TrT11 is ON at the charging period of C1 and it is OFF when C1 starts discharging, to cause output signal at the collector. This is shaped with the wave shape circuit consisting of TrT12, T13 and resistors R15 to R17, and the delay trigger pulse having the time width set with the time constant of C1 discharging is outputted.
COPYRIGHT: (C)1979,JPO&Japio
JP5806078A 1978-05-15 1978-05-15 Delay trigger pulse generation circuit Pending JPS54151361A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5806078A JPS54151361A (en) 1978-05-15 1978-05-15 Delay trigger pulse generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5806078A JPS54151361A (en) 1978-05-15 1978-05-15 Delay trigger pulse generation circuit

Publications (1)

Publication Number Publication Date
JPS54151361A true JPS54151361A (en) 1979-11-28

Family

ID=13073358

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5806078A Pending JPS54151361A (en) 1978-05-15 1978-05-15 Delay trigger pulse generation circuit

Country Status (1)

Country Link
JP (1) JPS54151361A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072313A (en) * 1983-09-28 1985-04-24 Nec Corp Pulse generating circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4825465A (en) * 1971-08-04 1973-04-03

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4825465A (en) * 1971-08-04 1973-04-03

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072313A (en) * 1983-09-28 1985-04-24 Nec Corp Pulse generating circuit

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