JPS54144168A - Carrier pick up circuit including pulse insertion circuit - Google Patents

Carrier pick up circuit including pulse insertion circuit

Info

Publication number
JPS54144168A
JPS54144168A JP5255878A JP5255878A JPS54144168A JP S54144168 A JPS54144168 A JP S54144168A JP 5255878 A JP5255878 A JP 5255878A JP 5255878 A JP5255878 A JP 5255878A JP S54144168 A JPS54144168 A JP S54144168A
Authority
JP
Japan
Prior art keywords
circuit
pulse
carrier
pick
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5255878A
Other languages
Japanese (ja)
Inventor
Ichiro Takase
Yoshihiko Akaiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5255878A priority Critical patent/JPS54144168A/en
Publication of JPS54144168A publication Critical patent/JPS54144168A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2275—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses the received modulated signals
    • H04L27/2276—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses the received modulated signals using frequency multiplication or harmonic tracking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To enable to pick up the carrier stably even at lower carrier power/noise power, by adding the pulse insertion circuit between the slicer and the n frequency division circuit. CONSTITUTION:The pulse insertion circuit 405 is added between the slicer 404 of the carrier pick up circuit and the n frequency division circuit 406. In the circuit 405, the signal (a) from the input 501 is differentiated 502 into the waveform (b), one output is fed to the logical sum integrated circuit 505, and another output is given to the discrimination circuit 503. If the pulses on half way are missing (dotted lines of the waveform (b)), the state of the circuit 503 retriggered with the pulse is fallen after T1(T1>T) (c), and it is detected that no input pulse is present. Further, the pulse generator circuit 504 is risen with the trailing of the input pulse (c) to cause the pulse (d) fallen after T2. But, the pulse (d) is at the position of missing pulse for (b). By synthesizing the (b) and (d) with the circuit 50, regular pulse train is obtained at the output terminal 506.
JP5255878A 1978-04-28 1978-04-28 Carrier pick up circuit including pulse insertion circuit Pending JPS54144168A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5255878A JPS54144168A (en) 1978-04-28 1978-04-28 Carrier pick up circuit including pulse insertion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5255878A JPS54144168A (en) 1978-04-28 1978-04-28 Carrier pick up circuit including pulse insertion circuit

Publications (1)

Publication Number Publication Date
JPS54144168A true JPS54144168A (en) 1979-11-10

Family

ID=12918133

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5255878A Pending JPS54144168A (en) 1978-04-28 1978-04-28 Carrier pick up circuit including pulse insertion circuit

Country Status (1)

Country Link
JP (1) JPS54144168A (en)

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