JPS54141634A - Recorder - Google Patents

Recorder

Info

Publication number
JPS54141634A
JPS54141634A JP4942478A JP4942478A JPS54141634A JP S54141634 A JPS54141634 A JP S54141634A JP 4942478 A JP4942478 A JP 4942478A JP 4942478 A JP4942478 A JP 4942478A JP S54141634 A JPS54141634 A JP S54141634A
Authority
JP
Japan
Prior art keywords
head
bits
recording
digital signal
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4942478A
Other languages
Japanese (ja)
Inventor
Kenji Fujino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Hokushin Electric Corp
Yokogawa Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hokushin Electric Corp, Yokogawa Electric Works Ltd filed Critical Yokogawa Hokushin Electric Corp
Priority to JP4942478A priority Critical patent/JPS54141634A/en
Publication of JPS54141634A publication Critical patent/JPS54141634A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To achieve the improvement in resolution and recording quality without increasing the density of heads by moving a mutistylus head through the utilization of 1 or 2 bits of the output signal of an A/D converter.
CONSTITUTION: The analog signal applied to input terminal 1 is converted to the digital signal of n bits by an A/D converter 2 and the minimum bit thereof is applied to a head moving command circuit 6 and the remaining n-1 bits are applied to a decoder 3, respectively. The decoder 3, recording head driving circuit 4 and multistylus head 5 perform recording by receiving the digital signal of n-1 bits. In addition, the head moving command circuit 6 moves the head 5 by 1/2 pitch by way of a head mover 7. The head 5 then performs the recording corresponding to the digital signal of n-1 bits in the moved state. In this way, the improvement in resolution and recording quality may be achieved without increasing the density of the heads.
COPYRIGHT: (C)1979,JPO&Japio
JP4942478A 1978-04-26 1978-04-26 Recorder Pending JPS54141634A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4942478A JPS54141634A (en) 1978-04-26 1978-04-26 Recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4942478A JPS54141634A (en) 1978-04-26 1978-04-26 Recorder

Publications (1)

Publication Number Publication Date
JPS54141634A true JPS54141634A (en) 1979-11-05

Family

ID=12830695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4942478A Pending JPS54141634A (en) 1978-04-26 1978-04-26 Recorder

Country Status (1)

Country Link
JP (1) JPS54141634A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5099746A (en) * 1973-12-30 1975-08-07

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5099746A (en) * 1973-12-30 1975-08-07

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