JPS54138333A - Processing circuit for carrier chrominance signal - Google Patents

Abstract

PURPOSE: To quicken the response of APC, by detecting the phase difference betweem the burst signal picked up from the carrier chrominance signal and the reference signal, and shifting the phase of the carrier chrominance signal from the output.

CONSTITUTION: The variable phase shifter circuit 50 is constituted with the switch circuit 51 and the inverter 52, and the alternating signal S₃₃ or -S₃₃ is fed to the converter 23 from this circuit. Further, the burst signal Sb is picked up from the carrier chrominance signal Ss from the frequency converter 23, and it is fed to the phase difference detection circuit 60 together with the reference signal S₄₃ from the oscillation circuit 43, and when the phase difference ϕ between the signals Sb and S₄₃ is within 90°, a voltage E₆₃ which is zero at that case, is fed to the FF64 and that which is 1, is fed to the FF64 to feed the output to the circuit 51. When the carrier chrominance signal Sc is greatly changed with the changeover of the switch circuit 12 and the phase difference ϕ between the signals S₄₃ and Sb is more than ±90°, E₆₃ is 1 to trigger FF64. The circuit 51 is changed over, the signal -S₃₃ is added to the converter 23, the phase of the signal Ss is inverted to cause ϕ within ±90°. Accordingly, ϕ is converged into Zero by APC.

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