JPS54132169A - Method of forming mutual connecting structure of aluminum on ic chip - Google Patents

Method of forming mutual connecting structure of aluminum on ic chip

Info

Publication number
JPS54132169A
JPS54132169A JP3498679A JP3498679A JPS54132169A JP S54132169 A JPS54132169 A JP S54132169A JP 3498679 A JP3498679 A JP 3498679A JP 3498679 A JP3498679 A JP 3498679A JP S54132169 A JPS54132169 A JP S54132169A
Authority
JP
Japan
Prior art keywords
chip
aluminum
connecting structure
mutual connecting
forming mutual
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3498679A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6252460B2 (enExample
Inventor
Ii Tonpuson Chiyaaruzu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burroughs Corp filed Critical Burroughs Corp
Publication of JPS54132169A publication Critical patent/JPS54132169A/ja
Publication of JPS6252460B2 publication Critical patent/JPS6252460B2/ja
Granted legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00—Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02—Anodisation
    • C25D11/04—Anodisation of aluminium or alloys based thereon
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00—Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02—Anodisation
    • C25D11/04—Anodisation of aluminium or alloys based thereon
    • C25D11/12—Anodising more than once, e.g. in different baths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
JP3498679A 1978-04-03 1979-03-20 Method of forming mutual connecting structure of aluminum on ic chip Granted JPS54132169A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/892,943 US4146440A (en) 1978-04-03 1978-04-03 Method for forming an aluminum interconnect structure on an integrated circuit chip

Publications (2)

Publication Number Publication Date
JPS54132169A true JPS54132169A (en) 1979-10-13
JPS6252460B2 JPS6252460B2 (enExample) 1987-11-05

Family

ID=25400751

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3498679A Granted JPS54132169A (en) 1978-04-03 1979-03-20 Method of forming mutual connecting structure of aluminum on ic chip

Country Status (2)

Country Link
US (1) US4146440A (enExample)
JP (1) JPS54132169A (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4358339A (en) * 1978-07-27 1982-11-09 Rockwell International Corporation Method of fabrication of bubble domain device structures
US4456506A (en) * 1982-01-28 1984-06-26 Sperry Corporation Superconducting circuit fabrication
US5783483A (en) * 1993-02-24 1998-07-21 Intel Corporation Method of fabricating a barrier against metal diffusion
US6387771B1 (en) * 1999-06-08 2002-05-14 Infineon Technologies Ag Low temperature oxidation of conductive layers for semiconductor fabrication
US6899815B2 (en) * 2002-03-29 2005-05-31 Intel Corporation Multi-layer integrated circuit package

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50145859A (enExample) * 1974-05-13 1975-11-22

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3827949A (en) * 1972-03-29 1974-08-06 Ibm Anodic oxide passivated planar aluminum metallurgy system and method of producing
JPS5722885B2 (enExample) * 1974-02-18 1982-05-15
US4045302A (en) * 1976-07-08 1977-08-30 Burroughs Corporation Multilevel metallization process

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50145859A (enExample) * 1974-05-13 1975-11-22

Also Published As

Publication number Publication date
US4146440A (en) 1979-03-27
JPS6252460B2 (enExample) 1987-11-05

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