JPS54129957A - Load protective circuit of amplifier - Google Patents
Load protective circuit of amplifierInfo
- Publication number
- JPS54129957A JPS54129957A JP3777078A JP3777078A JPS54129957A JP S54129957 A JPS54129957 A JP S54129957A JP 3777078 A JP3777078 A JP 3777078A JP 3777078 A JP3777078 A JP 3777078A JP S54129957 A JPS54129957 A JP S54129957A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- delay
- amplifier
- memory unit
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/305—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in case of switching on or off of a power supply
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
PURPOSE:To prevent malfunction due to a pop noise at the time when the power supply is put to work, by providing a memory unit stored with cut-off operation on the basis of the abnormality detection signal of an amplifier and a method of inhibiting the memory unit from operating for a certain time by a delay method. CONSTITUTION:Once the abnormal DC potential of amplifier 11 or abnormality of power loss, heat load impendance, etc., is detected by DC detector 14 or PC detector 15, FF16 is set by the detection signal. By the set signal of FF16, relay driver circuit 19 is stopped and contact 12 is closed, thereby protecting speaker SP. Supplying a reset signal from reset circuit 17 to FF16 allows circuit 19 to operate after delay by delay circuit 20 for a certain time, and contact 12 is made, so that the circuit will become stationary. With the power switch opened, the same operation is performed. While delay circuit 20 is operating at the time of power feeding, inhibit circuit 18 inhibits the setting of FF16 of the memory unit, so that the malfunction of FF16 will be prevented which is caused by a pop noise.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53037770A JPS592403B2 (en) | 1978-03-31 | 1978-03-31 | Amplifier load protection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53037770A JPS592403B2 (en) | 1978-03-31 | 1978-03-31 | Amplifier load protection circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54129957A true JPS54129957A (en) | 1979-10-08 |
JPS592403B2 JPS592403B2 (en) | 1984-01-18 |
Family
ID=12506693
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53037770A Expired JPS592403B2 (en) | 1978-03-31 | 1978-03-31 | Amplifier load protection circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS592403B2 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4953751A (en) * | 1972-09-28 | 1974-05-24 |
-
1978
- 1978-03-31 JP JP53037770A patent/JPS592403B2/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4953751A (en) * | 1972-09-28 | 1974-05-24 |
Also Published As
Publication number | Publication date |
---|---|
JPS592403B2 (en) | 1984-01-18 |
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