JPS54127649A - Interlock mechanism - Google Patents
Interlock mechanismInfo
- Publication number
- JPS54127649A JPS54127649A JP1150679A JP1150679A JPS54127649A JP S54127649 A JPS54127649 A JP S54127649A JP 1150679 A JP1150679 A JP 1150679A JP 1150679 A JP1150679 A JP 1150679A JP S54127649 A JPS54127649 A JP S54127649A
- Authority
- JP
- Japan
- Prior art keywords
- interlock mechanism
- interlock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/3822—Parallel decoding, e.g. parallel decode units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US88709378A | 1978-03-16 | 1978-03-16 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54127649A true JPS54127649A (en) | 1979-10-03 |
JPS6112289B2 JPS6112289B2 (de) | 1986-04-07 |
Family
ID=25390443
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1150679A Granted JPS54127649A (en) | 1978-03-16 | 1979-02-05 | Interlock mechanism |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS54127649A (de) |
DE (1) | DE2906685A1 (de) |
FR (1) | FR2420168B1 (de) |
GB (1) | GB2016753A (de) |
IT (1) | IT1166667B (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6227829A (ja) * | 1985-07-30 | 1987-02-05 | Fujitsu Ltd | 多重ロード命令制御装置 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2561429B1 (fr) * | 1984-03-13 | 1986-09-19 | Trt Telecom Radio Electr | Dispositif d'adressage pour fournir a une memoire des codes d'adresse |
EP0159712B1 (de) * | 1984-04-27 | 1991-01-30 | Bull HN Information Systems Inc. | Steuerungsgerät in einem digitalen Computer |
DE3650578T2 (de) * | 1985-06-17 | 1997-03-06 | Nec Corp | Informationsverarbeitungssystem mit einer Steuerschaltung zum Abwarten einer Registererneuerung und einem Aufnahmemittel des zu erneuernden Registers |
US5167026A (en) * | 1989-02-03 | 1992-11-24 | Digital Equipment Corporation | Simultaneously or sequentially decoding multiple specifiers of a variable length pipeline instruction based on detection of modified value of specifier registers |
US5142631A (en) * | 1989-02-03 | 1992-08-25 | Digital Equipment Corporation | System for queuing individual read or write mask and generating respective composite mask for controlling access to general purpose register |
US5450555A (en) * | 1990-06-29 | 1995-09-12 | Digital Equipment Corporation | Register logging in pipelined computer using register log queue of register content changes and base queue of register log queue pointers for respective instructions |
EP0463965B1 (de) * | 1990-06-29 | 1998-09-09 | Digital Equipment Corporation | Sprungvorhersageeinheit für hochleistungsfähigen Prozessor |
US5432918A (en) * | 1990-06-29 | 1995-07-11 | Digital Equipment Corporation | Method and apparatus for ordering read and write operations using conflict bits in a write queue |
US5471591A (en) * | 1990-06-29 | 1995-11-28 | Digital Equipment Corporation | Combined write-operand queue and read-after-write dependency scoreboard |
US11457671B2 (en) | 2019-12-20 | 2022-10-04 | Maddox Holdings Inc. | Maternity undergarment for gentle support and shape enhancement |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4912742A (de) * | 1972-05-09 | 1974-02-04 | ||
JPS4946347A (de) * | 1972-09-06 | 1974-05-02 | ||
JPS5041442A (de) * | 1973-08-16 | 1975-04-15 | ||
JPS5318931A (en) * | 1976-08-06 | 1978-02-21 | Hitachi Ltd | Information processor |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3477063A (en) * | 1967-10-26 | 1969-11-04 | Ibm | Controller for data processing system |
-
1979
- 1979-01-25 FR FR7902412A patent/FR2420168B1/fr not_active Expired
- 1979-02-05 JP JP1150679A patent/JPS54127649A/ja active Granted
- 1979-02-21 DE DE19792906685 patent/DE2906685A1/de active Granted
- 1979-02-27 IT IT20567/79A patent/IT1166667B/it active
- 1979-03-15 GB GB7909169A patent/GB2016753A/en not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4912742A (de) * | 1972-05-09 | 1974-02-04 | ||
JPS4946347A (de) * | 1972-09-06 | 1974-05-02 | ||
JPS5041442A (de) * | 1973-08-16 | 1975-04-15 | ||
JPS5318931A (en) * | 1976-08-06 | 1978-02-21 | Hitachi Ltd | Information processor |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6227829A (ja) * | 1985-07-30 | 1987-02-05 | Fujitsu Ltd | 多重ロード命令制御装置 |
JPH0578053B2 (de) * | 1985-07-30 | 1993-10-28 | Fujitsu Ltd |
Also Published As
Publication number | Publication date |
---|---|
JPS6112289B2 (de) | 1986-04-07 |
IT1166667B (it) | 1987-05-06 |
GB2016753B (de) | |
IT7920567A0 (it) | 1979-02-27 |
FR2420168A1 (fr) | 1979-10-12 |
GB2016753A (en) | 1979-09-26 |
DE2906685A1 (de) | 1979-09-20 |
FR2420168B1 (fr) | 1986-09-26 |
DE2906685C2 (de) | 1988-04-14 |
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