JPS54116808A - Decentralized control system of automatic switchboard - Google Patents

Decentralized control system of automatic switchboard

Info

Publication number
JPS54116808A
JPS54116808A JP2409278A JP2409278A JPS54116808A JP S54116808 A JPS54116808 A JP S54116808A JP 2409278 A JP2409278 A JP 2409278A JP 2409278 A JP2409278 A JP 2409278A JP S54116808 A JPS54116808 A JP S54116808A
Authority
JP
Japan
Prior art keywords
processors
memory
control
networks
connections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2409278A
Other languages
Japanese (ja)
Other versions
JPS5829919B2 (en
Inventor
Kazunori Fujita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP53024092A priority Critical patent/JPS5829919B2/en
Priority to US05/917,342 priority patent/US4210782A/en
Publication of JPS54116808A publication Critical patent/JPS54116808A/en
Publication of JPS5829919B2 publication Critical patent/JPS5829919B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To control a switchboard with large circuit capacity by a microprocessor by composing a control circuit of several microprocessors and by providing an information transfer line for information transmission among processors and a memory method which executes a switching process and stores data. CONSTITUTION:Trunks 611 to 61n are connected to switching networks 51 to 5m to which extension telephone sets 111 to 11n via line circuits 211 to 21n and attendant boards 311 to 31n via attendant-board control circuits 411 to 41n are connected, and signal control processors 711 to 7m1 controlling signals and connection control processors 911 to 9p1 controlling connections are provided corresponding to those networks 51 to m. Moreover, memory 101 which attains the half-fixed storing of system data is provided and connections among processors 711 to 7m1 and 911 to 9p1, and memory 101 are made via two-way buses 82 and 83 for transferring information; memory 101 is used from either processors 711 to 7m1 or 911 to 9p1 and networks 51 to 5m are divided and controlled.
JP53024092A 1977-06-23 1978-03-02 Data memory control method in automatic switching equipment Expired JPS5829919B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP53024092A JPS5829919B2 (en) 1978-03-02 1978-03-02 Data memory control method in automatic switching equipment
US05/917,342 US4210782A (en) 1977-06-23 1978-06-20 Distributed control type telephone switching system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53024092A JPS5829919B2 (en) 1978-03-02 1978-03-02 Data memory control method in automatic switching equipment

Publications (2)

Publication Number Publication Date
JPS54116808A true JPS54116808A (en) 1979-09-11
JPS5829919B2 JPS5829919B2 (en) 1983-06-25

Family

ID=12128727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53024092A Expired JPS5829919B2 (en) 1977-06-23 1978-03-02 Data memory control method in automatic switching equipment

Country Status (1)

Country Link
JP (1) JPS5829919B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53142808A (en) * 1977-05-19 1978-12-12 Nec Corp Control system for multiprocessor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53142808A (en) * 1977-05-19 1978-12-12 Nec Corp Control system for multiprocessor

Also Published As

Publication number Publication date
JPS5829919B2 (en) 1983-06-25

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