JPS54114138A - Channel control system - Google Patents
Channel control systemInfo
- Publication number
- JPS54114138A JPS54114138A JP2083878A JP2083878A JPS54114138A JP S54114138 A JPS54114138 A JP S54114138A JP 2083878 A JP2083878 A JP 2083878A JP 2083878 A JP2083878 A JP 2083878A JP S54114138 A JPS54114138 A JP S54114138A
- Authority
- JP
- Japan
- Prior art keywords
- bus
- memory
- control
- channel control
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To reduce the hardware quantity of the channel part as well as to ensure the flexible channel control by performing both the decoding and the self-diagnosis of the channel control word through the microcomputer.
CONSTITUTION: With execution of the SIO order, microcomputer 51 takes channel control block CCB into memory 52. And then the CCB is decoded, and the data transfer is carried out through selector bus 55 in the route of the input/output device - memory 52 - H bus 41 - the main memory. Computer 51 consists of the ROM storing the firmware to control arithmetic process part ACU and bus control part BCU to control the input/output bus and the memory bus. Also the self-diagnosis can be carried out by computer 51 and with execution of the TIO order.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2083878A JPS54114138A (en) | 1978-02-27 | 1978-02-27 | Channel control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2083878A JPS54114138A (en) | 1978-02-27 | 1978-02-27 | Channel control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54114138A true JPS54114138A (en) | 1979-09-06 |
Family
ID=12038204
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2083878A Pending JPS54114138A (en) | 1978-02-27 | 1978-02-27 | Channel control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54114138A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5945571A (en) * | 1982-09-06 | 1984-03-14 | Yokogawa Hokushin Electric Corp | Device for controlling data transfer |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5258433A (en) * | 1975-11-10 | 1977-05-13 | Hitachi Ltd | Subchannel control system |
JPS5320836A (en) * | 1976-08-11 | 1978-02-25 | Epson Corp | Integrated circuit having timer and computation performance |
JPS5320837A (en) * | 1976-08-11 | 1978-02-25 | Epson Corp | Integrated circuit having timer and computation performance |
JPS5475954A (en) * | 1977-11-30 | 1979-06-18 | Hitachi Ltd | Data channel unit |
JPS5498140A (en) * | 1978-01-20 | 1979-08-02 | Hitachi Ltd | Channel control system |
-
1978
- 1978-02-27 JP JP2083878A patent/JPS54114138A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5258433A (en) * | 1975-11-10 | 1977-05-13 | Hitachi Ltd | Subchannel control system |
JPS5320836A (en) * | 1976-08-11 | 1978-02-25 | Epson Corp | Integrated circuit having timer and computation performance |
JPS5320837A (en) * | 1976-08-11 | 1978-02-25 | Epson Corp | Integrated circuit having timer and computation performance |
JPS5475954A (en) * | 1977-11-30 | 1979-06-18 | Hitachi Ltd | Data channel unit |
JPS5498140A (en) * | 1978-01-20 | 1979-08-02 | Hitachi Ltd | Channel control system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5945571A (en) * | 1982-09-06 | 1984-03-14 | Yokogawa Hokushin Electric Corp | Device for controlling data transfer |
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