JPS54104703A - Rejection circuit for noise pulse - Google Patents

Rejection circuit for noise pulse

Info

Publication number
JPS54104703A
JPS54104703A JP1167178A JP1167178A JPS54104703A JP S54104703 A JPS54104703 A JP S54104703A JP 1167178 A JP1167178 A JP 1167178A JP 1167178 A JP1167178 A JP 1167178A JP S54104703 A JPS54104703 A JP S54104703A
Authority
JP
Japan
Prior art keywords
circuit
noise pulse
output
rejection circuit
interrupts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1167178A
Other languages
Japanese (ja)
Other versions
JPS5943016B2 (en
Inventor
Masahiro Watanabe
Shigeru Yano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1167178A priority Critical patent/JPS5943016B2/en
Publication of JPS54104703A publication Critical patent/JPS54104703A/en
Publication of JPS5943016B2 publication Critical patent/JPS5943016B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE: To enable to effectively reject noise pulse, by adding a simple circuit to the noise pulse rejection circuit used for the FM stereo receiver.
CONSTITUTION: The second switch circuit 8 passes the output of the delay circuit only when the output of the monostable multivibrator 3 is "O", interrupts it only when "1", and the pilot signal rejection circuit 9 rejects the pilot signal component in 19 kHz in the output signal of the circuit 8. Further, while the second hold circuit 10 interrupts the output signal of the circuit 9 as input by the circuit 8, it holds the input signal level immediately before the interruption and outputs the input signal as it is in other cases. Thus, the noise pulse can effectively be rejected with a simple constitution.
COPYRIGHT: (C)1979,JPO&Japio
JP1167178A 1978-02-03 1978-02-03 Noise pulse removal circuit Expired JPS5943016B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1167178A JPS5943016B2 (en) 1978-02-03 1978-02-03 Noise pulse removal circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1167178A JPS5943016B2 (en) 1978-02-03 1978-02-03 Noise pulse removal circuit

Publications (2)

Publication Number Publication Date
JPS54104703A true JPS54104703A (en) 1979-08-17
JPS5943016B2 JPS5943016B2 (en) 1984-10-19

Family

ID=11784439

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1167178A Expired JPS5943016B2 (en) 1978-02-03 1978-02-03 Noise pulse removal circuit

Country Status (1)

Country Link
JP (1) JPS5943016B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5648729A (en) * 1979-09-28 1981-05-02 Pioneer Electronic Corp Detecting circuit for multipath disturbance of radio wave

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5648729A (en) * 1979-09-28 1981-05-02 Pioneer Electronic Corp Detecting circuit for multipath disturbance of radio wave

Also Published As

Publication number Publication date
JPS5943016B2 (en) 1984-10-19

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