JPS54103647A - Program process monitor system - Google Patents

Program process monitor system

Info

Publication number
JPS54103647A
JPS54103647A JP1095278A JP1095278A JPS54103647A JP S54103647 A JPS54103647 A JP S54103647A JP 1095278 A JP1095278 A JP 1095278A JP 1095278 A JP1095278 A JP 1095278A JP S54103647 A JPS54103647 A JP S54103647A
Authority
JP
Japan
Prior art keywords
terminal
timer
given
output
monitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1095278A
Other languages
Japanese (ja)
Other versions
JPS6041777B2 (en
Inventor
Akihiko Tsukudai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP53010952A priority Critical patent/JPS6041777B2/en
Publication of JPS54103647A publication Critical patent/JPS54103647A/en
Publication of JPS6041777B2 publication Critical patent/JPS6041777B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To ensure the mutual monitor between CPU and the clocks for the peripheral units by installing the 3rd monitor timer in addition to 1st and 2nd monitor timers.
CONSTITUTION: The clock supplied to terminal 29 is given to the input terminal, timer 23 and 27 start counting. In case the signal of terminal 21 stops among the periodical reset signals which are given to terminal 21 and 25, no output is delivered from timer 27 but timer 23 delivers the time-up output to give the alarm via OR circuit 213. On the other hand, the counting of timer 217 is advanced by the timer progress order given from terminal 215, and the reset order enters terminal 214 via the input from terminal 29 with no count-up output delivered to terminal 218. Now, if the clock of terminal 29 is cut off, timer 23 and 27 are stopped but timer 217 performs counting with every timer progress order given. Thus, the count- up order is given to terminal 218 to deliver the alarm via OR circuit 213.
COPYRIGHT: (C)1979,JPO&Japio
JP53010952A 1978-02-01 1978-02-01 Program processing monitoring method Expired JPS6041777B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53010952A JPS6041777B2 (en) 1978-02-01 1978-02-01 Program processing monitoring method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53010952A JPS6041777B2 (en) 1978-02-01 1978-02-01 Program processing monitoring method

Publications (2)

Publication Number Publication Date
JPS54103647A true JPS54103647A (en) 1979-08-15
JPS6041777B2 JPS6041777B2 (en) 1985-09-18

Family

ID=11764520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53010952A Expired JPS6041777B2 (en) 1978-02-01 1978-02-01 Program processing monitoring method

Country Status (1)

Country Link
JP (1) JPS6041777B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5773418A (en) * 1980-10-27 1982-05-08 Yamatake Honeywell Co Ltd Watchdog timer
JPS58169259A (en) * 1982-03-31 1983-10-05 Nec Home Electronics Ltd Monitoring circuit for operation of microcomputer
JPS62259149A (en) * 1986-05-02 1987-11-11 Toshiba Corp Runaway release system
JPH05299315A (en) * 1992-04-20 1993-11-12 Nec Kyushu Ltd Manufacturing equipment of semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0359383A (en) * 1989-07-28 1991-03-14 Sanyo Electric Co Ltd Low-temperature chamber

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5773418A (en) * 1980-10-27 1982-05-08 Yamatake Honeywell Co Ltd Watchdog timer
JPS58169259A (en) * 1982-03-31 1983-10-05 Nec Home Electronics Ltd Monitoring circuit for operation of microcomputer
JPS62259149A (en) * 1986-05-02 1987-11-11 Toshiba Corp Runaway release system
JPH05299315A (en) * 1992-04-20 1993-11-12 Nec Kyushu Ltd Manufacturing equipment of semiconductor device

Also Published As

Publication number Publication date
JPS6041777B2 (en) 1985-09-18

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