JPS5373953A - Flip-flop circuit - Google Patents

Flip-flop circuit

Info

Publication number
JPS5373953A
JPS5373953A JP14936376A JP14936376A JPS5373953A JP S5373953 A JPS5373953 A JP S5373953A JP 14936376 A JP14936376 A JP 14936376A JP 14936376 A JP14936376 A JP 14936376A JP S5373953 A JPS5373953 A JP S5373953A
Authority
JP
Japan
Prior art keywords
flip
flop circuit
gate
reduced number
high integration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14936376A
Other languages
Japanese (ja)
Other versions
JPS5847091B2 (en
Inventor
Tetsuya Iizuka
Kiyoshi Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP51149363A priority Critical patent/JPS5847091B2/en
Publication of JPS5373953A publication Critical patent/JPS5373953A/en
Publication of JPS5847091B2 publication Critical patent/JPS5847091B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits

Landscapes

  • Logic Circuits (AREA)

Abstract

PURPOSE:To ensure formation of a flip-flop circuit of high integration density by using a reduced number of gate.
JP51149363A 1976-12-14 1976-12-14 flip-flop circuit Expired JPS5847091B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51149363A JPS5847091B2 (en) 1976-12-14 1976-12-14 flip-flop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51149363A JPS5847091B2 (en) 1976-12-14 1976-12-14 flip-flop circuit

Publications (2)

Publication Number Publication Date
JPS5373953A true JPS5373953A (en) 1978-06-30
JPS5847091B2 JPS5847091B2 (en) 1983-10-20

Family

ID=15473490

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51149363A Expired JPS5847091B2 (en) 1976-12-14 1976-12-14 flip-flop circuit

Country Status (1)

Country Link
JP (1) JPS5847091B2 (en)

Also Published As

Publication number Publication date
JPS5847091B2 (en) 1983-10-20

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