JPS533723A - Frame synchronous system - Google Patents

Frame synchronous system

Info

Publication number
JPS533723A
JPS533723A JP7832976A JP7832976A JPS533723A JP S533723 A JPS533723 A JP S533723A JP 7832976 A JP7832976 A JP 7832976A JP 7832976 A JP7832976 A JP 7832976A JP S533723 A JPS533723 A JP S533723A
Authority
JP
Japan
Prior art keywords
synchronous system
frame synchronous
protection
frame
established
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7832976A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5653894B2 (en:Method
Inventor
Tsuneo Kinoshita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7832976A priority Critical patent/JPS533723A/ja
Publication of JPS533723A publication Critical patent/JPS533723A/ja
Publication of JPS5653894B2 publication Critical patent/JPS5653894B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP7832976A 1976-06-30 1976-06-30 Frame synchronous system Granted JPS533723A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7832976A JPS533723A (en) 1976-06-30 1976-06-30 Frame synchronous system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7832976A JPS533723A (en) 1976-06-30 1976-06-30 Frame synchronous system

Publications (2)

Publication Number Publication Date
JPS533723A true JPS533723A (en) 1978-01-13
JPS5653894B2 JPS5653894B2 (en:Method) 1981-12-22

Family

ID=13658919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7832976A Granted JPS533723A (en) 1976-06-30 1976-06-30 Frame synchronous system

Country Status (1)

Country Link
JP (1) JPS533723A (en:Method)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58153542A (ja) * 1982-03-03 1983-09-12 ニュ−ウェル　インダストリ−ズ、インコ−ポレ−テッド ハンマミル
JPS5967746A (ja) * 1982-10-12 1984-04-17 Fujitsu Ltd 多点監視フレ−ム同期パタ−ン検出回路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS498471A (en:Method) * 1972-05-22 1974-01-25

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS498471A (en:Method) * 1972-05-22 1974-01-25

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58153542A (ja) * 1982-03-03 1983-09-12 ニュ−ウェル　インダストリ−ズ、インコ−ポレ−テッド ハンマミル
JPS5967746A (ja) * 1982-10-12 1984-04-17 Fujitsu Ltd 多点監視フレ−ム同期パタ−ン検出回路

Also Published As

Publication number Publication date
JPS5653894B2 (en:Method) 1981-12-22

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