JPS53143566U - - Google Patents
Info
- Publication number
- JPS53143566U JPS53143566U JP4922977U JP4922977U JPS53143566U JP S53143566 U JPS53143566 U JP S53143566U JP 4922977 U JP4922977 U JP 4922977U JP 4922977 U JP4922977 U JP 4922977U JP S53143566 U JPS53143566 U JP S53143566U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
Landscapes
- Die Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4922977U JPS53143566U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-04-18 | 1977-04-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4922977U JPS53143566U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-04-18 | 1977-04-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS53143566U true JPS53143566U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1978-11-13 |
Family
ID=28934427
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4922977U Pending JPS53143566U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-04-18 | 1977-04-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53143566U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015109294A (ja) * | 2013-12-03 | 2015-06-11 | 三菱電機株式会社 | 電力用半導体装置およびその製造方法 |
JP2015205335A (ja) * | 2014-04-23 | 2015-11-19 | アイシン精機株式会社 | レーザ接合方法、レーザ接合品及びレーザ接合装置 |
-
1977
- 1977-04-18 JP JP4922977U patent/JPS53143566U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015109294A (ja) * | 2013-12-03 | 2015-06-11 | 三菱電機株式会社 | 電力用半導体装置およびその製造方法 |
JP2015205335A (ja) * | 2014-04-23 | 2015-11-19 | アイシン精機株式会社 | レーザ接合方法、レーザ接合品及びレーザ接合装置 |