JPS5314352B2 - - Google Patents
Info
- Publication number
- JPS5314352B2 JPS5314352B2 JP10634472A JP10634472A JPS5314352B2 JP S5314352 B2 JPS5314352 B2 JP S5314352B2 JP 10634472 A JP10634472 A JP 10634472A JP 10634472 A JP10634472 A JP 10634472A JP S5314352 B2 JPS5314352 B2 JP S5314352B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
- H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
- H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/67—Complementary BJTs
- H10D84/673—Vertical complementary BJTs
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/053—Field effect transistors fets
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/151—Simultaneous diffusion
Landscapes
- Bipolar Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US19859371A | 1971-11-15 | 1971-11-15 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4859784A JPS4859784A (esLanguage) | 1973-08-22 |
| JPS5314352B2 true JPS5314352B2 (esLanguage) | 1978-05-17 |
Family
ID=22734011
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10634472A Expired JPS5314352B2 (esLanguage) | 1971-11-15 | 1972-10-25 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3752715A (esLanguage) |
| JP (1) | JPS5314352B2 (esLanguage) |
| DE (1) | DE2246147C3 (esLanguage) |
| FR (1) | FR2160463B1 (esLanguage) |
| GB (1) | GB1334319A (esLanguage) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4879585A (esLanguage) * | 1972-01-24 | 1973-10-25 | ||
| US4146905A (en) * | 1974-06-18 | 1979-03-27 | U.S. Philips Corporation | Semiconductor device having complementary transistor structures and method of manufacturing same |
| JPS5260078A (en) * | 1975-11-12 | 1977-05-18 | Matsushita Electronics Corp | Pnp type transistor for semiconductor integrated circuit |
| SU773793A1 (ru) * | 1977-11-02 | 1980-10-23 | Предприятие П/Я -6429 | Способ изготовлени полупроводниковых интегральных бипол рных схем |
| JPS55151349A (en) * | 1979-05-15 | 1980-11-25 | Matsushita Electronics Corp | Forming method of insulation isolating region |
| JPS57167653A (en) * | 1981-03-23 | 1982-10-15 | Fujitsu Ltd | Manufacture of semiconductor device |
| US4512816A (en) * | 1982-02-26 | 1985-04-23 | National Semiconductor Corporation | High-density IC isolation technique capacitors |
-
1971
- 1971-11-15 US US00198593A patent/US3752715A/en not_active Expired - Lifetime
-
1972
- 1972-09-05 GB GB4108372A patent/GB1334319A/en not_active Expired
- 1972-09-20 DE DE2246147A patent/DE2246147C3/de not_active Expired
- 1972-10-25 JP JP10634472A patent/JPS5314352B2/ja not_active Expired
- 1972-11-08 FR FR7240414A patent/FR2160463B1/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2246147A1 (de) | 1973-05-17 |
| US3752715A (en) | 1973-08-14 |
| FR2160463A1 (esLanguage) | 1973-06-29 |
| DE2246147C3 (de) | 1981-01-15 |
| GB1334319A (en) | 1973-10-17 |
| DE2246147B2 (de) | 1980-04-24 |
| FR2160463B1 (esLanguage) | 1977-04-22 |
| JPS4859784A (esLanguage) | 1973-08-22 |