JPS5314332B1 - - Google Patents
Info
- Publication number
- JPS5314332B1 JPS5314332B1 JP6950772A JP6950772A JPS5314332B1 JP S5314332 B1 JPS5314332 B1 JP S5314332B1 JP 6950772 A JP6950772 A JP 6950772A JP 6950772 A JP6950772 A JP 6950772A JP S5314332 B1 JPS5314332 B1 JP S5314332B1
- Authority
- JP
- Japan
- Prior art keywords
- gate
- permits
- logic
- levels
- controlled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/18—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
- G11C19/182—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
- G11C19/184—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes with field-effect transistors, e.g. MOS-FET
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/01855—Interface arrangements synchronous, i.e. using clock signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Logic Circuits (AREA)
- Shift Register Type Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16147971A | 1971-07-12 | 1971-07-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5314332B1 true JPS5314332B1 (enExample) | 1978-05-17 |
Family
ID=22581338
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6950772A Pending JPS5314332B1 (enExample) | 1971-07-12 | 1972-07-11 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US3731114A (enExample) |
| JP (1) | JPS5314332B1 (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5931253B2 (ja) * | 1972-08-25 | 1984-08-01 | 株式会社日立製作所 | デプレツシヨン型負荷トランジスタを有するｍｉｓｆｅｔ論理回路 |
| JPS4971860A (enExample) * | 1972-11-10 | 1974-07-11 | ||
| US3808458A (en) * | 1972-11-30 | 1974-04-30 | Gen Electric | Dynamic shift register |
| DE2346966B2 (de) * | 1973-09-18 | 1976-07-29 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur uebertragung von signalen zwischen zwei chips mit schnellen komplementaer-mos-schaltungen |
| JPS54161288A (en) * | 1978-06-12 | 1979-12-20 | Hitachi Ltd | Semiconductor device |
| US4439691A (en) * | 1981-12-23 | 1984-03-27 | Bell Telephone Laboratories, Incorporated | Non-inverting shift register stage in MOS technology |
| GB8723839D0 (en) * | 1987-10-10 | 1987-11-11 | Lucas Ind Plc | Self-energising disc brakes |
| US6867619B2 (en) * | 2003-06-04 | 2005-03-15 | Wintek Corporation | Shift registers |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3395292A (en) * | 1965-10-19 | 1968-07-30 | Gen Micro Electronics Inc | Shift register using insulated gate field effect transistors |
| GB1127687A (en) * | 1965-12-13 | 1968-09-18 | Rca Corp | Logic circuitry |
| US3582674A (en) * | 1967-08-23 | 1971-06-01 | American Micro Syst | Logic circuit |
| US3524077A (en) * | 1968-02-28 | 1970-08-11 | Rca Corp | Translating information with multi-phase clock signals |
| GB1280047A (en) * | 1968-09-19 | 1972-07-05 | Matsushita Electronics Corp | Integrated signal converter circuit |
| US3573490A (en) * | 1968-12-30 | 1971-04-06 | Texas Instruments Inc | Capacitor pull-up reigister bit |
| US3610951A (en) * | 1969-04-03 | 1971-10-05 | Sprague Electric Co | Dynamic shift register |
| US3582975A (en) * | 1969-04-17 | 1971-06-01 | Bell Telephone Labor Inc | Gateable coupling circuit |
| US3601627A (en) * | 1970-07-13 | 1971-08-24 | North American Rockwell | Multiple phase logic gates for shift register stages |
-
1971
- 1971-07-12 US US00161479A patent/US3731114A/en not_active Expired - Lifetime
-
1972
- 1972-07-11 JP JP6950772A patent/JPS5314332B1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US3731114A (en) | 1973-05-01 |
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