JPS53129926A - Memory control system - Google Patents

Memory control system

Info

Publication number
JPS53129926A
JPS53129926A JP4444677A JP4444677A JPS53129926A JP S53129926 A JPS53129926 A JP S53129926A JP 4444677 A JP4444677 A JP 4444677A JP 4444677 A JP4444677 A JP 4444677A JP S53129926 A JPS53129926 A JP S53129926A
Authority
JP
Japan
Prior art keywords
loop
control system
memory control
faulty
inforamtion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4444677A
Other languages
Japanese (ja)
Other versions
JPS601719B2 (en
Inventor
Kazuo Furukawa
Sumio Furukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP52044446A priority Critical patent/JPS601719B2/en
Priority to SE7804449A priority patent/SE434686B/en
Priority to DE2817134A priority patent/DE2817134C2/en
Priority to US05/897,692 priority patent/US4233669A/en
Priority to GB15720/78A priority patent/GB1595410A/en
Priority to BE186973A priority patent/BE866205A/en
Publication of JPS53129926A publication Critical patent/JPS53129926A/en
Publication of JPS601719B2 publication Critical patent/JPS601719B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
    • G11C19/0875—Organisation of a plurality of magnetic shift registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/287—Organisation of a multiplicity of shift registers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE: To realize the faulty loop selection memory control system which features the reduced hardware quentity, simplified constitution and furthemore enhanced chip yield, by installing an additional memory which stores the inforamtion indicating whether the information loop is a normal loop or a faulty loop.
COPYRIGHT: (C)1978,JPO&Japio
JP52044446A 1977-04-20 1977-04-20 Memory control method Expired JPS601719B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP52044446A JPS601719B2 (en) 1977-04-20 1977-04-20 Memory control method
SE7804449A SE434686B (en) 1977-04-20 1978-04-19 Memory controller
DE2817134A DE2817134C2 (en) 1977-04-20 1978-04-19 Storage control system
US05/897,692 US4233669A (en) 1977-04-20 1978-04-19 Redundant bubble memory control system
GB15720/78A GB1595410A (en) 1977-04-20 1978-04-20 Memory control system
BE186973A BE866205A (en) 1977-04-20 1978-04-20 MEMORY COMMAND SYSTEM

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52044446A JPS601719B2 (en) 1977-04-20 1977-04-20 Memory control method

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP56205303A Division JPS6049997B2 (en) 1981-12-21 1981-12-21 Memory control method

Publications (2)

Publication Number Publication Date
JPS53129926A true JPS53129926A (en) 1978-11-13
JPS601719B2 JPS601719B2 (en) 1985-01-17

Family

ID=12691707

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52044446A Expired JPS601719B2 (en) 1977-04-20 1977-04-20 Memory control method

Country Status (2)

Country Link
JP (1) JPS601719B2 (en)
BE (1) BE866205A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111813619A (en) * 2020-06-10 2020-10-23 珠海欧比特宇航科技股份有限公司 Loading switching device for large-capacity memory

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS48105424U (en) * 1972-03-15 1973-12-07
JPS49129449A (en) * 1973-04-09 1974-12-11

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS48105424U (en) * 1972-03-15 1973-12-07
JPS49129449A (en) * 1973-04-09 1974-12-11

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111813619A (en) * 2020-06-10 2020-10-23 珠海欧比特宇航科技股份有限公司 Loading switching device for large-capacity memory

Also Published As

Publication number Publication date
JPS601719B2 (en) 1985-01-17
BE866205A (en) 1978-08-14

Similar Documents

Publication Publication Date Title
JPS547252A (en) Program control system
JPS53121441A (en) Duplicated information processor
JPS52117004A (en) Error control for loop transmission
JPS544086A (en) Memory circuit unit
JPS545637A (en) Communication control unit
JPS52137933A (en) Control system for display of information
JPS53129926A (en) Memory control system
JPS5338237A (en) Multi processor system
JPS53134336A (en) Memory unit
JPS5438726A (en) Display unit
JPS5393735A (en) Memory control system
JPS5364430A (en) Cash memory diagnosis system
JPS5395544A (en) Information processor
JPS538525A (en) Address designation system
JPS546743A (en) Inter-processor coupling systm
JPS53107241A (en) Magnetic bubble memory unit
JPS5316549A (en) Data exchange control system
JPS5370733A (en) Initial set error detector
JPS53138645A (en) Sharing memory access system
JPS5396643A (en) Communication system of information
JPS5420625A (en) Fault discrimination ststem of memory system
JPS52115632A (en) Data transmission and indication system
JPS522332A (en) Indication control system
JPS53105148A (en) Program selective system
JPS5326631A (en) Logic circuit diagnosis system for main memory control uni t