JPS529406A - Device for detecting and correcting plo phase - Google Patents

Device for detecting and correcting plo phase

Info

Publication number
JPS529406A
JPS529406A JP51080025A JP8002576A JPS529406A JP S529406 A JPS529406 A JP S529406A JP 51080025 A JP51080025 A JP 51080025A JP 8002576 A JP8002576 A JP 8002576A JP S529406 A JPS529406 A JP S529406A
Authority
JP
Japan
Prior art keywords
correcting
detecting
plo
phase
plo phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP51080025A
Other languages
English (en)
Japanese (ja)
Other versions
JPS623498B2 (OSRAM
Inventor
Jiyosefu Fuasubenda Chiyaarusu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Publication of JPS529406A publication Critical patent/JPS529406A/ja
Publication of JPS623498B2 publication Critical patent/JPS623498B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Error Detection And Correction (AREA)
JP51080025A 1975-07-07 1976-07-07 Device for detecting and correcting plo phase Granted JPS529406A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/594,144 US4009490A (en) 1975-07-07 1975-07-07 PLO phase detector and corrector

Publications (2)

Publication Number Publication Date
JPS529406A true JPS529406A (en) 1977-01-25
JPS623498B2 JPS623498B2 (OSRAM) 1987-01-26

Family

ID=24377717

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51080025A Granted JPS529406A (en) 1975-07-07 1976-07-07 Device for detecting and correcting plo phase

Country Status (6)

Country Link
US (1) US4009490A (OSRAM)
JP (1) JPS529406A (OSRAM)
CA (1) CA1067998A (OSRAM)
DE (1) DE2630197C3 (OSRAM)
FR (1) FR2317702A1 (OSRAM)
GB (1) GB1513634A (OSRAM)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5970332A (ja) * 1982-10-16 1984-04-20 Trio Kenwood Corp ジツタ付加回路
JPS61105778A (ja) * 1984-06-05 1986-05-23 メモレツクス・コ−ポレ−シヨン 磁気記憶装置システムの検査方法
JPS61292278A (ja) * 1985-06-14 1986-12-23 Fujitsu Ltd 位相ずれ検出回路

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4146743A (en) * 1976-08-09 1979-03-27 Hewlett-Packard Company Adaptive sampling decoder-encoder apparatus and method
US4109236A (en) * 1977-06-17 1978-08-22 Honeywell Information Systems Inc. Apparatus for digital data recovery from mass storage devices
US4142215A (en) * 1977-12-02 1979-02-27 The Telex Corporation Tape drive tester
US4173027A (en) * 1977-12-20 1979-10-30 Honeywell Information Systems Inc. Write precompensation system
US4544964A (en) * 1978-02-24 1985-10-01 Burroughs Corporation Strobe for read/write chain
US4357707A (en) * 1979-04-11 1982-11-02 Pertec Computer Corporation Digital phase lock loop for flexible disk data recovery system
US4459623A (en) * 1982-01-18 1984-07-10 Mds Qantel Corporation Method and apparatus for recovering NRZ information from MFM data
US4520408A (en) * 1983-02-22 1985-05-28 Vsp Labs, Inc. Clock signal synchronization apparatus and method for decoding self-clocking encoded data
US4612586A (en) * 1984-06-05 1986-09-16 Memorex Corporation Method for measuring timing asymmetry in a magnetic storage system
US4851932A (en) * 1988-01-29 1989-07-25 Storage Technology Corporation Adaptive compensation circuit for moving data storage media
DE3807046A1 (de) * 1988-03-04 1989-10-12 Seitz Enzinger Noll Masch Verfahren und vorrichtung zum abfuellen von kohlensaeurehaltigen fluessigkeiten, insbesondere getraenken, unter gegendruck in gefaesse oder dgl.
US5262904A (en) * 1991-01-22 1993-11-16 International Business Machines Corporation Method and apparatus for measuring and compensating nonlinear bitshift
US6636467B1 (en) * 2000-06-30 2003-10-21 Hewlett-Packard Development Company, L.P. Method and apparatus for accurately calibrating the timing of a write onto storage media
JP4930074B2 (ja) * 2007-01-24 2012-05-09 富士通株式会社 位相調整機能の評価方法、情報処理装置、プログラム及びコンピュータ読取可能な情報記録媒体
JP5262996B2 (ja) * 2009-05-26 2013-08-14 富士通セミコンダクター株式会社 論理シミュレーション装置、方法、及びプログラム

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3641534A (en) * 1969-12-29 1972-02-08 Ibm Intrarecord resynchronization in digital-recording systems
US3864735A (en) * 1973-09-12 1975-02-04 Burroughs Corp Read/write system for high density magnetic recording
US3938184A (en) * 1975-03-21 1976-02-10 The United States Of America As Represented By The Secretary Of The Navy Digital flutter reduction system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5970332A (ja) * 1982-10-16 1984-04-20 Trio Kenwood Corp ジツタ付加回路
JPS61105778A (ja) * 1984-06-05 1986-05-23 メモレツクス・コ−ポレ−シヨン 磁気記憶装置システムの検査方法
JPS61292278A (ja) * 1985-06-14 1986-12-23 Fujitsu Ltd 位相ずれ検出回路

Also Published As

Publication number Publication date
CA1067998A (en) 1979-12-11
DE2630197A1 (de) 1977-01-20
FR2317702B1 (OSRAM) 1980-10-03
JPS623498B2 (OSRAM) 1987-01-26
FR2317702A1 (fr) 1977-02-04
US4009490A (en) 1977-02-22
DE2630197B2 (OSRAM) 1978-06-15
GB1513634A (en) 1978-06-07
DE2630197C3 (de) 1979-02-15

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