JPS5234641A - Variable delay device - Google Patents

Variable delay device

Info

Publication number
JPS5234641A
JPS5234641A JP50110272A JP11027275A JPS5234641A JP S5234641 A JPS5234641 A JP S5234641A JP 50110272 A JP50110272 A JP 50110272A JP 11027275 A JP11027275 A JP 11027275A JP S5234641 A JPS5234641 A JP S5234641A
Authority
JP
Japan
Prior art keywords
variable delay
delay device
output signal
charge transfer
transfer element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50110272A
Other languages
Japanese (ja)
Other versions
JPS5936352B2 (en
Inventor
Akifumi Ide
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP50110272A priority Critical patent/JPS5936352B2/en
Publication of JPS5234641A publication Critical patent/JPS5234641A/en
Publication of JPS5936352B2 publication Critical patent/JPS5936352B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/282—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements with charge storage in a depletion layer, i.e. charge coupled devices [CCD]
    • G11C19/285—Peripheral circuits, e.g. for writing into the first stage; for reading-out of the last stage

Landscapes

  • Picture Signal Circuits (AREA)
  • Television Signal Processing For Recording (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Networks Using Active Elements (AREA)

Abstract

PURPOSE:Variable delay device protected from output signal level variation affected from clock rate variation by adding offset signal to the output signal of charge transfer element.
JP50110272A 1975-09-10 1975-09-10 variable delay device Expired JPS5936352B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50110272A JPS5936352B2 (en) 1975-09-10 1975-09-10 variable delay device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50110272A JPS5936352B2 (en) 1975-09-10 1975-09-10 variable delay device

Publications (2)

Publication Number Publication Date
JPS5234641A true JPS5234641A (en) 1977-03-16
JPS5936352B2 JPS5936352B2 (en) 1984-09-03

Family

ID=14531469

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50110272A Expired JPS5936352B2 (en) 1975-09-10 1975-09-10 variable delay device

Country Status (1)

Country Link
JP (1) JPS5936352B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883882U (en) * 1981-11-30 1983-06-07 三洋電機株式会社 Jitter correction circuit
US5146332A (en) * 1989-09-07 1992-09-08 Kabushiki Kaisha Toshiba Video signal delay circuit having self adjusting gain

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61191959U (en) * 1985-05-23 1986-11-29
JPS6238754U (en) * 1985-08-29 1987-03-07

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5883882U (en) * 1981-11-30 1983-06-07 三洋電機株式会社 Jitter correction circuit
US5146332A (en) * 1989-09-07 1992-09-08 Kabushiki Kaisha Toshiba Video signal delay circuit having self adjusting gain
WO1993017521A1 (en) * 1989-09-07 1993-09-02 Kenji Hara Video signal delay circuit

Also Published As

Publication number Publication date
JPS5936352B2 (en) 1984-09-03

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