JPS52155976A - Method of forming mask for integrated circuit pattern - Google Patents

Method of forming mask for integrated circuit pattern

Info

Publication number
JPS52155976A
JPS52155976A JP7195277A JP7195277A JPS52155976A JP S52155976 A JPS52155976 A JP S52155976A JP 7195277 A JP7195277 A JP 7195277A JP 7195277 A JP7195277 A JP 7195277A JP S52155976 A JPS52155976 A JP S52155976A
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit pattern
forming mask
mask
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7195277A
Other languages
English (en)
Japanese (ja)
Inventor
Watsuson Danieru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Publication of JPS52155976A publication Critical patent/JPS52155976A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70475—Stitching, i.e. connecting image fields to produce a device field, the field occupied by a device such as a memory chip, processor chip, CCD, flat panel display

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
JP7195277A 1976-06-18 1977-06-17 Method of forming mask for integrated circuit pattern Pending JPS52155976A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7618601A FR2355315A1 (fr) 1976-06-18 1976-06-18 Procede de realisation de masques photographiques

Publications (1)

Publication Number Publication Date
JPS52155976A true JPS52155976A (en) 1977-12-24

Family

ID=9174599

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7195277A Pending JPS52155976A (en) 1976-06-18 1977-06-17 Method of forming mask for integrated circuit pattern

Country Status (3)

Country Link
JP (1) JPS52155976A (enrdf_load_stackoverflow)
DE (1) DE2727190A1 (enrdf_load_stackoverflow)
FR (1) FR2355315A1 (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60218650A (ja) * 1984-04-16 1985-11-01 Canon Inc パタ−ン露光方法
JPS61247025A (ja) * 1985-04-25 1986-11-04 Canon Inc 表示パネル製造方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0055620B1 (en) * 1980-12-29 1985-12-18 Fujitsu Limited Method of projecting circuit patterns
DE3138761A1 (de) * 1981-09-29 1983-04-14 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung von ueberlappungsgewichteten interdigitalstrukturen
DE19520819A1 (de) * 1995-05-30 1996-12-05 Deutsche Telekom Ag Verfahren zur Ausnutzung scheibenförmigen Ausgangsmaterials bei der Herstellung optoelektronischer Bauelemente mit Gittern variabler Gitterperiode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60218650A (ja) * 1984-04-16 1985-11-01 Canon Inc パタ−ン露光方法
JPS61247025A (ja) * 1985-04-25 1986-11-04 Canon Inc 表示パネル製造方法

Also Published As

Publication number Publication date
DE2727190A1 (de) 1977-12-22
FR2355315A1 (fr) 1978-01-13
DE2727190C3 (enrdf_load_stackoverflow) 1980-06-12
DE2727190B2 (enrdf_load_stackoverflow) 1979-09-20
FR2355315B1 (enrdf_load_stackoverflow) 1980-04-18

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