JPS52143006A - Discriminating method and circuit - Google Patents

Discriminating method and circuit

Info

Publication number
JPS52143006A
JPS52143006A JP5698177A JP5698177A JPS52143006A JP S52143006 A JPS52143006 A JP S52143006A JP 5698177 A JP5698177 A JP 5698177A JP 5698177 A JP5698177 A JP 5698177A JP S52143006 A JPS52143006 A JP S52143006A
Authority
JP
Japan
Prior art keywords
circuit
discriminating method
discriminating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5698177A
Other languages
English (en)
Other versions
JPH0156462B2 (ja
Inventor
Matsuzora Mario
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Olivetti SpA
Original Assignee
Olivetti SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olivetti SpA filed Critical Olivetti SpA
Publication of JPS52143006A publication Critical patent/JPS52143006A/ja
Publication of JPH0156462B2 publication Critical patent/JPH0156462B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)
JP5698177A 1976-05-20 1977-05-17 Discriminating method and circuit Granted JPS52143006A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT68232/76A IT1072341B (it) 1976-05-20 1976-05-20 Circuito e metodo per la discriminazione in lettura di dati preregistrati con codici diversi

Publications (2)

Publication Number Publication Date
JPS52143006A true JPS52143006A (en) 1977-11-29
JPH0156462B2 JPH0156462B2 (ja) 1989-11-30

Family

ID=11308597

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5698177A Granted JPS52143006A (en) 1976-05-20 1977-05-17 Discriminating method and circuit

Country Status (5)

Country Link
US (1) US4151565A (ja)
JP (1) JPS52143006A (ja)
DE (1) DE2723485A1 (ja)
GB (1) GB1585579A (ja)
IT (1) IT1072341B (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS563421A (en) * 1979-06-21 1981-01-14 Canon Inc Signal converting device

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4231071A (en) * 1978-07-17 1980-10-28 Digital Equipment Corporation Reader for data recorded on magnetic disks at plural densities
US4298956A (en) * 1979-05-14 1981-11-03 Honeywell Information Systems Inc. Digital read recovery with variable frequency compensation using read only memories
US4320465A (en) * 1979-05-14 1982-03-16 Honeywell Information Systems Inc. Digital frequency modulation and modified frequency modulation read recovery with data separation
JPS59185069A (ja) * 1983-04-04 1984-10-20 Mitsubishi Electric Corp 記録媒体読み出し制御システム
JP2661064B2 (ja) * 1987-09-30 1997-10-08 ソニー株式会社 データ再生装置
DE3808862A1 (de) * 1988-03-17 1989-09-28 Thomson Brandt Gmbh Aufzeichnungsgeraet
US5036409A (en) * 1989-03-15 1991-07-30 Deutsche Thomson-Brandt Gmbh Signal selection arrangement
US7320101B1 (en) * 2003-08-19 2008-01-15 Altera Corporation Fast parallel calculation of cyclic redundancy checks
US7613991B1 (en) 2003-08-19 2009-11-03 Altera Corporation Method and apparatus for concurrent calculation of cyclic redundancy checks

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5143907A (ja) * 1974-10-12 1976-04-15 Fujitsu Ltd Jikisochiseigyohoshiki

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1121828B (de) * 1955-12-02 1962-01-11 Suedwestfunk Anstalt Des Oeffe Einrichtung zur selbsttaetigen Einstellung der Abspielgeschwindigkeiten bei Tonwiedergabegeraeten mit mehreren Geschwindigkeiten
US3133189A (en) * 1960-08-05 1964-05-12 Hewlett Packard Co Electronic interpolating counter for the time interval and frequency measurment
US3581297A (en) * 1967-09-18 1971-05-25 Burroughs Corp Binary data handling system
US3623074A (en) * 1969-06-27 1971-11-23 Ibm Digital data recovery by wavelength interpretation
US3947876A (en) * 1975-01-06 1976-03-30 C. J. Kennedy Company Dual density 800 bpi NRZI and 1600 bpi PE read circuit for a digital magnetic tape transport

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5143907A (ja) * 1974-10-12 1976-04-15 Fujitsu Ltd Jikisochiseigyohoshiki

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS563421A (en) * 1979-06-21 1981-01-14 Canon Inc Signal converting device

Also Published As

Publication number Publication date
IT1072341B (it) 1985-04-10
GB1585579A (en) 1981-03-04
US4151565A (en) 1979-04-24
DE2723485A1 (de) 1977-12-08
JPH0156462B2 (ja) 1989-11-30
DE2723485C2 (ja) 1989-05-24

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