JPS52125241A - Memory configuration used for digital data processing system - Google Patents

Memory configuration used for digital data processing system

Info

Publication number
JPS52125241A
JPS52125241A JP1490777A JP1490777A JPS52125241A JP S52125241 A JPS52125241 A JP S52125241A JP 1490777 A JP1490777 A JP 1490777A JP 1490777 A JP1490777 A JP 1490777A JP S52125241 A JPS52125241 A JP S52125241A
Authority
JP
Japan
Prior art keywords
data processing
processing system
digital data
configuration used
memory configuration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1490777A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6338794B2 (en, 2012
Inventor
Aaru Jienkinsu Suchiibun
Ei Noosuratsupu Toomasu
Ii Suchiyuaato Robaato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of JPS52125241A publication Critical patent/JPS52125241A/ja
Publication of JPS6338794B2 publication Critical patent/JPS6338794B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4239—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with asynchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
JP1490777A 1976-02-13 1977-02-14 Memory configuration used for digital data processing system Granted JPS52125241A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/658,113 US4055851A (en) 1976-02-13 1976-02-13 Memory module with means for generating a control signal that inhibits a subsequent overlapped memory cycle during a reading operation portion of a reading memory cycle

Publications (2)

Publication Number Publication Date
JPS52125241A true JPS52125241A (en) 1977-10-20
JPS6338794B2 JPS6338794B2 (en, 2012) 1988-08-02

Family

ID=24639954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1490777A Granted JPS52125241A (en) 1976-02-13 1977-02-14 Memory configuration used for digital data processing system

Country Status (5)

Country Link
US (3) US4055851A (en, 2012)
JP (1) JPS52125241A (en, 2012)
CA (1) CA1083724A (en, 2012)
DE (1) DE2705858A1 (en, 2012)
GB (4) GB1579061A (en, 2012)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01239636A (ja) * 1988-03-18 1989-09-25 Nec Corp マイクロコンピュータシステム

Families Citing this family (113)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4212057A (en) * 1976-04-22 1980-07-08 General Electric Company Shared memory multi-microprocessor computer system
US4137565A (en) * 1977-01-10 1979-01-30 Xerox Corporation Direct memory access module for a controller
US4158227A (en) * 1977-10-12 1979-06-12 Bunker Ramo Corporation Paged memory mapping with elimination of recurrent decoding
US4195342A (en) * 1977-12-22 1980-03-25 Honeywell Information Systems Inc. Multi-configurable cache store system
US4296466A (en) * 1978-01-23 1981-10-20 Data General Corporation Data processing system including a separate input/output processor with micro-interrupt request apparatus
DK157954C (da) * 1978-01-23 1990-08-13 Data General Corp Databehandlingsanlaeg med direkte lageradgang
US4514808A (en) * 1978-04-28 1985-04-30 Tokyo Shibaura Denki Kabushiki Kaisha Data transfer system for a data processing system provided with direct memory access units
US4218756A (en) * 1978-06-19 1980-08-19 Bell Telephone Laboratories, Incorporated Control circuit for modifying contents of packet switch random access memory
DE2842288A1 (de) * 1978-09-28 1980-04-17 Siemens Ag Datentransferschalter mit assoziativer adressauswahl in einem virtuellen speicher
US4240138A (en) * 1978-10-03 1980-12-16 Texas Instruments Incorporated System for direct access to a memory associated with a microprocessor
GB2037039B (en) * 1978-12-11 1983-08-17 Honeywell Inf Systems Cache memory system
US4217640A (en) * 1978-12-11 1980-08-12 Honeywell Information Systems Inc. Cache unit with transit block buffer apparatus
US4208716A (en) * 1978-12-11 1980-06-17 Honeywell Information Systems Inc. Cache arrangement for performing simultaneous read/write operations
DE2853501A1 (de) * 1978-12-12 1980-06-26 Ibm Deutschland Speicherhierarchie mit ladungsverschiebungsspeicher
US4321668A (en) * 1979-01-02 1982-03-23 Honeywell Information Systems Inc. Prediction of number of data words transferred and the cycle at which data is available
US4276609A (en) * 1979-01-04 1981-06-30 Ncr Corporation CCD memory retrieval system
US4245307A (en) * 1979-09-14 1981-01-13 Formation, Inc. Controller for data processing system
US4354225A (en) * 1979-10-11 1982-10-12 Nanodata Computer Corporation Intelligent main store for data processing systems
WO1981001066A1 (en) * 1979-10-11 1981-04-16 Nanodata Computer Corp Data processing system
US4462029A (en) * 1979-12-06 1984-07-24 Analogic Corporation Command bus
US4390969A (en) * 1980-04-21 1983-06-28 Burroughs Corporation Asynchronous data transmission system with state variable memory and handshaking protocol circuits
JPS6057090B2 (ja) * 1980-09-19 1985-12-13 株式会社日立製作所 データ記憶装置およびそれを用いた処理装置
US4370712A (en) * 1980-10-31 1983-01-25 Honeywell Information Systems Inc. Memory controller with address independent burst mode capability
US4366539A (en) * 1980-10-31 1982-12-28 Honeywell Information Systems Inc. Memory controller with burst mode capability
US4363095A (en) * 1980-12-31 1982-12-07 Honeywell Information Systems Inc. Hit/miss logic for a cache memory
US4424561A (en) 1980-12-31 1984-01-03 Honeywell Information Systems Inc. Odd/even bank structure for a cache memory
US4392201A (en) * 1980-12-31 1983-07-05 Honeywell Information Systems Inc. Diagnostic subsystem for a cache memory
US4378591A (en) * 1980-12-31 1983-03-29 Honeywell Information Systems Inc. Memory management unit for developing multiple physical addresses in parallel for use in a cache memory
EP0055579B1 (en) * 1980-12-31 1991-03-20 Bull HN Information Systems Inc. Cache memories with double word access
US4485435A (en) * 1981-03-09 1984-11-27 General Signal Corporation Memory management method and apparatus for initializing and/or clearing R/W storage areas
FR2503899A1 (fr) * 1981-04-08 1982-10-15 Thomson Csf Procede et dispositif de transmission de donnees numeriques
US4368515A (en) * 1981-05-07 1983-01-11 Atari, Inc. Bank switchable memory system
US4510582A (en) * 1981-06-01 1985-04-09 International Business Machines Corp. Binary number substitution mechanism
US4531199A (en) * 1981-06-01 1985-07-23 International Business Machines Corporation Binary number substitution mechanism in a control store element
US4438493A (en) 1981-07-06 1984-03-20 Honeywell Information Systems Inc. Multiwork memory data storage and addressing technique and apparatus
US4481570A (en) * 1981-08-07 1984-11-06 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Automatic multi-banking of memory for microprocessors
US4420807A (en) * 1981-08-31 1983-12-13 International Business Machines Corporation Selectively holding data in a buffer for defective backing store tracks
US4429363A (en) 1981-10-15 1984-01-31 International Business Machines Corporation Method and apparatus for managing data movements from a backing store to a caching buffer store
US4466059A (en) * 1981-10-15 1984-08-14 International Business Machines Corporation Method and apparatus for limiting data occupancy in a cache
US4473878A (en) * 1981-11-23 1984-09-25 Motorola, Inc. Memory management unit
JPS5948879A (ja) * 1982-09-10 1984-03-21 Hitachi Ltd 記憶制御方式
JPS60500187A (ja) * 1982-12-30 1985-02-07 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン データ処理システム
US4580217A (en) * 1983-06-22 1986-04-01 Ncr Corporation High speed memory management system and method
US4724518A (en) * 1983-07-29 1988-02-09 Hewlett-Packard Company Odd/even storage in cache memory
US4625273A (en) * 1983-08-30 1986-11-25 Amdahl Corporation Apparatus for fast data storage with deferred error reporting
US4615017A (en) * 1983-09-19 1986-09-30 International Business Machines Corporation Memory controller with synchronous or asynchronous interface
US4706190A (en) * 1983-09-22 1987-11-10 Digital Equipment Corporation Retry mechanism for releasing control of a communications path in digital computer system
DE3502147A1 (de) * 1984-01-23 1985-08-08 Hitachi Microcomputer Engineering Ltd., Kodaira, Tokio/Tokyo Datenverarbeitungssystem mit verbesserter pufferspeichersteuerung
US4587610A (en) * 1984-02-10 1986-05-06 Prime Computer, Inc. Address translation systems for high speed computer memories
US4771281A (en) * 1984-02-13 1988-09-13 Prime Computer, Inc. Bit selection and routing apparatus and method
US4584666A (en) * 1984-06-21 1986-04-22 Motorola, Inc. Method and apparatus for signed and unsigned bounds check
US5255384A (en) * 1985-02-22 1993-10-19 Intergraph Corporation Memory address translation system having modifiable and non-modifiable translation mechanisms
US4860192A (en) * 1985-02-22 1989-08-22 Intergraph Corporation Quadword boundary cache system
US4933835A (en) * 1985-02-22 1990-06-12 Intergraph Corporation Apparatus for maintaining consistency of a cache memory with a primary memory
US4884197A (en) * 1985-02-22 1989-11-28 Intergraph Corporation Method and apparatus for addressing a cache memory
US4899275A (en) * 1985-02-22 1990-02-06 Intergraph Corporation Cache-MMU system
US4916603A (en) * 1985-03-18 1990-04-10 Wang Labortatories, Inc. Distributed reference and change table for a virtual memory system
US4716545A (en) * 1985-03-19 1987-12-29 Wang Laboratories, Inc. Memory means with multiple word read and single word write
FR2586118B1 (fr) * 1985-08-06 1990-01-05 Bull Sems Procede d'echange de donnees entre un microprocesseur et une memoire et dispositif permettant la mise en oeuvre du procede
US4797853A (en) * 1985-11-15 1989-01-10 Unisys Corporation Direct memory access controller for improved system security, memory to memory transfers, and interrupt processing
US4937770A (en) * 1986-02-07 1990-06-26 Teradyne, Inc. Simulation system
US4893279A (en) * 1986-03-04 1990-01-09 Advanced Micro Devices Inc. Storage arrangement having a pair of RAM memories selectively configurable for dual-access and two single-access RAMs
US5561429A (en) * 1986-04-16 1996-10-01 Raytheon Company Content limit addressable memory
US4727486A (en) * 1986-05-02 1988-02-23 Honeywell Information Systems Inc. Hardware demand fetch cycle system interface
US4914582A (en) * 1986-06-27 1990-04-03 Hewlett-Packard Company Cache tag lookaside
US5091846A (en) * 1986-10-03 1992-02-25 Intergraph Corporation Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
JPS63225837A (ja) * 1987-03-13 1988-09-20 Fujitsu Ltd 距離付きベクトルアクセス方式
US4937733A (en) * 1987-05-01 1990-06-26 Digital Equipment Corporation Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system
US4858116A (en) * 1987-05-01 1989-08-15 Digital Equipment Corporation Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
US5341510A (en) * 1987-05-01 1994-08-23 Digital Equipment Corporation Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor
US4941083A (en) * 1987-05-01 1990-07-10 Digital Equipment Corporation Method and apparatus for initiating interlock read transactions on a multiprocessor computer system
US4949239A (en) * 1987-05-01 1990-08-14 Digital Equipment Corporation System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system
US4982321A (en) * 1987-10-23 1991-01-01 Honeywell Inc. Dual bus system
JP2965987B2 (ja) * 1988-02-22 1999-10-18 株式会社日立製作所 データ処理システム
US5155834A (en) * 1988-03-18 1992-10-13 Wang Laboratories, Inc. Reference and change table storage system for virtual memory data processing system having a plurality of processors accessing common memory
JPH01246656A (ja) * 1988-03-29 1989-10-02 Nec Corp プロセッサ間共有メモリ管理方式
NL8800858A (nl) * 1988-04-05 1989-11-01 Philips Nv Rekenmachinesysteem voorzien van een hoofdbus en een tussen processor en geheugen direkt verbonden extra kommunikatielijn.
US5140690A (en) * 1988-06-14 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Least-recently-used circuit
US5535359A (en) * 1988-12-02 1996-07-09 Mitsubishi Denki Kabushiki Kaisha Computer system with cache memory having address mask register
US5142676A (en) * 1988-12-28 1992-08-25 Gte Laboratories Incorporated Separate content addressable memories for storing locked segment addresses and locking processor identifications for controlling access to shared memory
JP2668438B2 (ja) * 1989-04-21 1997-10-27 三菱電機株式会社 データ検索装置
EP0421696A3 (en) * 1989-10-02 1992-01-29 Motorola Inc. Staggered access memory
US5341493A (en) * 1990-09-21 1994-08-23 Emc Corporation Disk storage system with write preservation during power failure
US5412788A (en) * 1992-04-16 1995-05-02 Digital Equipment Corporation Memory bank management and arbitration in multiprocessor computer system
KR100294105B1 (ko) * 1992-04-29 2001-09-17 썬 마이크로시스템즈, 인코포레이티드 멀티 프로세서 컴퓨터 시스템의 일관성 카피-백 버퍼용 방법 및 장치
US5479641A (en) * 1993-03-24 1995-12-26 Intel Corporation Method and apparatus for overlapped timing of cache operations including reading and writing with parity checking
US6115665A (en) * 1993-05-07 2000-09-05 Ford Motor Company Memory efficient computer system and method for controlling an automotive ignition system
US5535360A (en) * 1994-08-31 1996-07-09 Vlsi Technology, Inc. Digital computer system having an improved direct-mapped cache controller (with flag modification) for a CPU with address pipelining and method therefor
US5475690A (en) * 1994-11-10 1995-12-12 Digital Equipment Corporation Delay compensated signal propagation
JPH0934784A (ja) * 1995-07-14 1997-02-07 Sony Corp データ書込み回路、データ読出し回路及びデータ伝送装置
US5868437A (en) * 1995-07-17 1999-02-09 Teague; Anthony Composite pipe structure
US5638315A (en) * 1995-09-13 1997-06-10 International Business Machines Corporation Content addressable memory for a data processing system
US6006310A (en) * 1995-09-20 1999-12-21 Micron Electronics, Inc. Single memory device that functions as a multi-way set associative cache memory
GB2308469A (en) * 1995-12-22 1997-06-25 Motorola Inc Power conserving clocking system
US5696930A (en) * 1996-02-09 1997-12-09 Advanced Micro Devices, Inc. CAM accelerated buffer management
US5907863A (en) * 1996-08-16 1999-05-25 Unisys Corporation Memory control unit using preloaded values to generate optimal timing of memory control sequences between different memory segments
US6560682B1 (en) 1997-10-03 2003-05-06 Intel Corporation System and method for terminating lock-step sequences in a multiprocessor system
US6212616B1 (en) * 1998-03-23 2001-04-03 International Business Machines Corporation Even/odd cache directory mechanism
KR100280518B1 (ko) * 1998-11-10 2001-03-02 김영환 동기 에스램 회로
US6349357B1 (en) 1999-03-04 2002-02-19 Sun Microsystems, Inc. Storage architecture providing scalable performance through independent control and data transfer paths
US6370605B1 (en) 1999-03-04 2002-04-09 Sun Microsystems, Inc. Switch based scalable performance storage architecture
US6397267B1 (en) * 1999-03-04 2002-05-28 Sun Microsystems, Inc. Redirected I/O for scalable performance storage architecture
US6604155B1 (en) 1999-11-09 2003-08-05 Sun Microsystems, Inc. Storage architecture employing a transfer node to achieve scalable performance
US20020046061A1 (en) 2000-02-11 2002-04-18 Wright Kenneth L. Personal information system
US7809728B2 (en) * 2003-07-09 2010-10-05 Canon Kabushiki Kaisha Recording/playback apparatus and method
US8756437B2 (en) * 2008-08-22 2014-06-17 Datcard Systems, Inc. System and method of encryption for DICOM volumes
US8788519B2 (en) 2008-10-24 2014-07-22 John C. Canessa System and methods for metadata management in content addressable storage
US8930470B2 (en) 2010-04-23 2015-01-06 Datcard Systems, Inc. Event notification in interconnected content-addressable storage systems
WO2012078898A2 (en) 2010-12-10 2012-06-14 Datcard Systems, Inc. Secure portable medical information access systems and methods related thereto
US20140359181A1 (en) * 2013-05-31 2014-12-04 Hewlett-Packard Development Company, L.P. Delaying Bus Activity To Accomodate Memory Device Processing Time
WO2014209315A1 (en) * 2013-06-27 2014-12-31 Hewlett-Packard Development Company, L.P. Memory bus error signal
US20150100733A1 (en) * 2013-10-03 2015-04-09 Synopsys, Inc. Efficient Memory Organization
WO2015065426A1 (en) 2013-10-31 2015-05-07 Hewlett-Packard Development Company, L.P. Memory access for busy memory

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2980893A (en) * 1956-08-21 1961-04-18 Nippon Telegraph & Telephone Memory system for electric signal
US3376554A (en) * 1965-04-05 1968-04-02 Digital Equipment Corp Digital computing system
US3566358A (en) * 1968-03-19 1971-02-23 Bevier Hasbrouck Integrated multi-computer system
US3710324A (en) * 1970-04-01 1973-01-09 Digital Equipment Corp Data processing system
US3753232A (en) * 1972-04-06 1973-08-14 Honeywell Inf Systems Memory control system adaptive to different access and cycle times
US3821709A (en) * 1972-10-05 1974-06-28 Honeywell Inf Systems Memory storage sequencer
US3810110A (en) * 1973-05-01 1974-05-07 Digital Equipment Corp Computer system overlap of memory operation
UST949002I4 (en, 2012) 1975-07-25 1976-08-03

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01239636A (ja) * 1988-03-18 1989-09-25 Nec Corp マイクロコンピュータシステム

Also Published As

Publication number Publication date
GB1579063A (en) 1980-11-12
CA1083724A (en) 1980-08-12
JPS6338794B2 (en, 2012) 1988-08-02
US4151593A (en) 1979-04-24
US4149239A (en) 1979-04-10
GB1579064A (en) 1980-11-12
GB1579061A (en) 1980-11-12
US4055851A (en) 1977-10-25
GB1579062A (en) 1980-11-12
DE2705858A1 (de) 1977-08-18

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