JPS52124881A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS52124881A
JPS52124881A JP4120376A JP4120376A JPS52124881A JP S52124881 A JPS52124881 A JP S52124881A JP 4120376 A JP4120376 A JP 4120376A JP 4120376 A JP4120376 A JP 4120376A JP S52124881 A JPS52124881 A JP S52124881A
Authority
JP
Japan
Prior art keywords
semiconductor device
freedom
integration
scale
limiting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4120376A
Other languages
Japanese (ja)
Inventor
Genichi Adachi
Tadashi Dai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4120376A priority Critical patent/JPS52124881A/en
Publication of JPS52124881A publication Critical patent/JPS52124881A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Abstract

PURPOSE: To increase the scale of integration and the freedom of design by providing bump electrodes in given positions without limiting only to the peripheral regions on a semiconductor device.
COPYRIGHT: (C)1977,JPO&Japio
JP4120376A 1976-04-14 1976-04-14 Semiconductor device Pending JPS52124881A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4120376A JPS52124881A (en) 1976-04-14 1976-04-14 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4120376A JPS52124881A (en) 1976-04-14 1976-04-14 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS52124881A true JPS52124881A (en) 1977-10-20

Family

ID=12601847

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4120376A Pending JPS52124881A (en) 1976-04-14 1976-04-14 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS52124881A (en)

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