JPS52103945A - Latch circuit - Google Patents

Latch circuit

Info

Publication number
JPS52103945A
JPS52103945A JP2075576A JP2075576A JPS52103945A JP S52103945 A JPS52103945 A JP S52103945A JP 2075576 A JP2075576 A JP 2075576A JP 2075576 A JP2075576 A JP 2075576A JP S52103945 A JPS52103945 A JP S52103945A
Authority
JP
Japan
Prior art keywords
fet
latch circuit
depression
feed
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2075576A
Other languages
Japanese (ja)
Other versions
JPS5926134B2 (en
Inventor
Hirohiko Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP51020755A priority Critical patent/JPS5926134B2/en
Publication of JPS52103945A publication Critical patent/JPS52103945A/en
Publication of JPS5926134B2 publication Critical patent/JPS5926134B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable

Abstract

PURPOSE:To enable a static performance, unify clock signals into a single one by using a depression-type FET as a feed-back FET and realizing the concept of high integration/low power consumption by using a depression-type FET as a feed-back FET and connecting the source and gate of FET to the output of an inverter.
JP51020755A 1976-02-26 1976-02-26 latch circuit Expired JPS5926134B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51020755A JPS5926134B2 (en) 1976-02-26 1976-02-26 latch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51020755A JPS5926134B2 (en) 1976-02-26 1976-02-26 latch circuit

Publications (2)

Publication Number Publication Date
JPS52103945A true JPS52103945A (en) 1977-08-31
JPS5926134B2 JPS5926134B2 (en) 1984-06-25

Family

ID=12035995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51020755A Expired JPS5926134B2 (en) 1976-02-26 1976-02-26 latch circuit

Country Status (1)

Country Link
JP (1) JPS5926134B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54133041U (en) * 1978-03-07 1979-09-14
JPS59200520A (en) * 1983-04-27 1984-11-13 Hitachi Ltd Cmos flip-flop circuit
JPS6290020A (en) * 1985-10-15 1987-04-24 Mitsubishi Electric Corp Semiconductor integrated circuit
JPS62117409A (en) * 1985-11-15 1987-05-28 Mitsubishi Electric Corp Latch circuit
JPH02235434A (en) * 1989-03-09 1990-09-18 Mitsubishi Electric Corp Logic circuit device
JPH0514343U (en) * 1991-08-07 1993-02-23 株式会社サワタ建材社 Ceiling board mounting device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54133041U (en) * 1978-03-07 1979-09-14
JPS58531Y2 (en) * 1978-03-07 1983-01-06 株式会社写研 Holding device for photosensitive material in phototypesetting machine
JPS59200520A (en) * 1983-04-27 1984-11-13 Hitachi Ltd Cmos flip-flop circuit
JPS6290020A (en) * 1985-10-15 1987-04-24 Mitsubishi Electric Corp Semiconductor integrated circuit
JPH0353810B2 (en) * 1985-10-15 1991-08-16
JPS62117409A (en) * 1985-11-15 1987-05-28 Mitsubishi Electric Corp Latch circuit
JPH02235434A (en) * 1989-03-09 1990-09-18 Mitsubishi Electric Corp Logic circuit device
JP2540934B2 (en) * 1989-03-09 1996-10-09 三菱電機株式会社 Logic circuit device
JPH0514343U (en) * 1991-08-07 1993-02-23 株式会社サワタ建材社 Ceiling board mounting device

Also Published As

Publication number Publication date
JPS5926134B2 (en) 1984-06-25

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