JPS5168744A - - Google Patents

Info

Publication number
JPS5168744A
JPS5168744A JP50131548A JP13154875A JPS5168744A JP S5168744 A JPS5168744 A JP S5168744A JP 50131548 A JP50131548 A JP 50131548A JP 13154875 A JP13154875 A JP 13154875A JP S5168744 A JPS5168744 A JP S5168744A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50131548A
Other languages
Japanese (ja)
Other versions
JPS5911939B2 (ja
Inventor
Maachin Aauin Jon
Robaato Paueru Nooberu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US520542A external-priority patent/US3914590A/en
Priority claimed from US05/526,373 external-priority patent/US3947670A/en
Application filed by General Electric Co filed Critical General Electric Co
Publication of JPS5168744A publication Critical patent/JPS5168744A/ja
Publication of JPS5911939B2 publication Critical patent/JPS5911939B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/4806—Computations with complex numbers
    • G06F7/4812—Complex multiplication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/525—Multiplying only in serial-serial fashion, i.e. both operands being entered serially
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers
    • G06F2207/3816—Accepting numbers of variable word length
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
JP50131548A 1974-11-04 1975-11-04 フゴウツキカケザンロンリソウチ Expired JPS5911939B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US520542A US3914590A (en) 1974-11-04 1974-11-04 Serial two{3 s complementer
US05/526,373 US3947670A (en) 1974-11-22 1974-11-22 Signed multiplication logic

Publications (2)

Publication Number Publication Date
JPS5168744A true JPS5168744A (fr) 1976-06-14
JPS5911939B2 JPS5911939B2 (ja) 1984-03-19

Family

ID=27060176

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50131548A Expired JPS5911939B2 (ja) 1974-11-04 1975-11-04 フゴウツキカケザンロンリソウチ

Country Status (5)

Country Link
JP (1) JPS5911939B2 (fr)
DE (1) DE2549032A1 (fr)
FR (1) FR2289963A1 (fr)
GB (1) GB1523889A (fr)
IT (1) IT1044100B (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5949640A (ja) * 1982-09-16 1984-03-22 Toshiba Corp 乗算回路
JPS5965540U (ja) * 1982-10-25 1984-05-01 富士電機株式会社 インバ−タ装置
JPH06314950A (ja) * 1993-04-28 1994-11-08 Nec Corp 中間周波増幅回路

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10534840B1 (en) * 2018-08-08 2020-01-14 Sandisk Technologies Llc Multiplication using non-volatile memory cells

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5949640A (ja) * 1982-09-16 1984-03-22 Toshiba Corp 乗算回路
JPS5965540U (ja) * 1982-10-25 1984-05-01 富士電機株式会社 インバ−タ装置
JPS6246275Y2 (fr) * 1982-10-25 1987-12-12
JPH06314950A (ja) * 1993-04-28 1994-11-08 Nec Corp 中間周波増幅回路

Also Published As

Publication number Publication date
IT1044100B (it) 1980-03-20
FR2289963A1 (fr) 1976-05-28
JPS5911939B2 (ja) 1984-03-19
GB1523889A (en) 1978-09-06
DE2549032A1 (de) 1976-05-20
FR2289963B1 (fr) 1981-04-17

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