JPS51132968A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS51132968A
JPS51132968A JP5702575A JP5702575A JPS51132968A JP S51132968 A JPS51132968 A JP S51132968A JP 5702575 A JP5702575 A JP 5702575A JP 5702575 A JP5702575 A JP 5702575A JP S51132968 A JPS51132968 A JP S51132968A
Authority
JP
Japan
Prior art keywords
semiconductor device
cement
semiconductor devices
support section
less material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5702575A
Other languages
Japanese (ja)
Inventor
Manabu Bonshihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5702575A priority Critical patent/JPS51132968A/en
Publication of JPS51132968A publication Critical patent/JPS51132968A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE: To obtain bonding with a stable characteristic and with less material to cement semiconductor devices on the support section.
COPYRIGHT: (C)1976,JPO&Japio
JP5702575A 1975-05-14 1975-05-14 Semiconductor device Pending JPS51132968A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5702575A JPS51132968A (en) 1975-05-14 1975-05-14 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5702575A JPS51132968A (en) 1975-05-14 1975-05-14 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS51132968A true JPS51132968A (en) 1976-11-18

Family

ID=13043880

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5702575A Pending JPS51132968A (en) 1975-05-14 1975-05-14 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS51132968A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6427233A (en) * 1987-07-23 1989-01-30 Fujitsu Ltd Pellet for junction
JPH01160025A (en) * 1987-12-16 1989-06-22 Mitsubishi Electric Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6427233A (en) * 1987-07-23 1989-01-30 Fujitsu Ltd Pellet for junction
JPH01160025A (en) * 1987-12-16 1989-06-22 Mitsubishi Electric Corp Semiconductor device

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