JPS51107768A - - Google Patents
Info
- Publication number
- JPS51107768A JPS51107768A JP51016455A JP1645576A JPS51107768A JP S51107768 A JPS51107768 A JP S51107768A JP 51016455 A JP51016455 A JP 51016455A JP 1645576 A JP1645576 A JP 1645576A JP S51107768 A JPS51107768 A JP S51107768A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/60—Wet etching
- H10P50/64—Wet etching of semiconductor materials
- H10P50/642—Chemical etching
- H10P50/644—Anisotropic liquid etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
- H10P14/271—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials characterised by the preparation of substrate for selective deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3411—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
- H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
- H10P50/693—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
- Chemical Vapour Deposition (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19752506624 DE2506624C3 (de) | 1975-02-17 | Verfahren zum Herstellen von Siliziumeinlagerungen in einem Siliziumsubstrat mit koplanaren Oberflächen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS51107768A true JPS51107768A (https=) | 1976-09-24 |
Family
ID=5939056
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP51016455A Pending JPS51107768A (https=) | 1975-02-17 | 1976-02-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS51107768A (https=) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7063751B2 (en) | 2000-06-05 | 2006-06-20 | Denso Corporation | Semiconductor substrate formed by epitaxially filling a trench in a semiconductor substrate with a semiconductor material after smoothing the surface and rounding the corners |
| JP2007204158A (ja) * | 2006-01-30 | 2007-08-16 | Toshiba Elevator Co Ltd | ピットはしご付きエレベータかご |
| JP2008037544A (ja) * | 2006-08-03 | 2008-02-21 | Mitsubishi Electric Building Techno Service Co Ltd | エレベータのかご |
| JP2014183194A (ja) * | 2013-03-19 | 2014-09-29 | Hitachi Ltd | 半導体装置の製造方法 |
| JP2014183195A (ja) * | 2013-03-19 | 2014-09-29 | Hitachi Ltd | 半導体装置とその製造方法 |
-
1976
- 1976-02-17 JP JP51016455A patent/JPS51107768A/ja active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7063751B2 (en) | 2000-06-05 | 2006-06-20 | Denso Corporation | Semiconductor substrate formed by epitaxially filling a trench in a semiconductor substrate with a semiconductor material after smoothing the surface and rounding the corners |
| JP2007204158A (ja) * | 2006-01-30 | 2007-08-16 | Toshiba Elevator Co Ltd | ピットはしご付きエレベータかご |
| JP2008037544A (ja) * | 2006-08-03 | 2008-02-21 | Mitsubishi Electric Building Techno Service Co Ltd | エレベータのかご |
| JP2014183194A (ja) * | 2013-03-19 | 2014-09-29 | Hitachi Ltd | 半導体装置の製造方法 |
| JP2014183195A (ja) * | 2013-03-19 | 2014-09-29 | Hitachi Ltd | 半導体装置とその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| DE2506624B2 (de) | 1976-12-23 |
| DE2506624A1 (de) | 1976-08-26 |